CMOS Fabrication Process (Animation)
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@abhaygoyal3150
@abhaygoyal3150 9 ай бұрын
one of the best explanations
@zacharykraft3657
@zacharykraft3657 Жыл бұрын
1000 likes 🎉🎉
@varuvarudhini1434
@varuvarudhini1434 2 жыл бұрын
mind fcuk
@sho_k1
@sho_k1 2 жыл бұрын
thnaks dude
@vamsisyoutube928
@vamsisyoutube928 2 жыл бұрын
I want this animation please send me
@sanjaytumati
@sanjaytumati 3 жыл бұрын
A brilliant Video. Very well done. Very talented. It's interesting that oxide is needed for N+ diffusion but not for P+ diffusion. Why is that? I think oxide is needed in both cases. Also photoresist is used in every stage of masking. You have shown it only for Nwell deposition
@ctfar24
@ctfar24 3 жыл бұрын
can i know what editor did you used to make this animation?
@solahuddinjr2557
@solahuddinjr2557 3 жыл бұрын
Hi. I used Sony Vegas to create this animation. Since no sound added in, so it was just a simple one.
@bernardoborges5038
@bernardoborges5038 3 жыл бұрын
Really intuitive and visual way to explain it, great work and thank you.
@sumitrana2616
@sumitrana2616 3 жыл бұрын
Due to COVID19 Pandemic colleges are not opening and I can't access the cadence software so I searched for an open source software and I found GLADE. Check out my playlist on Layout Designing using GLADE. #LearnFromHome VLSI Layout Designing using GLADE (Open Source Software) Playlist Link:- kzbin.info/aero/PLWcG9vtrFH0YVZvd3yf2Xmm_Gl0y-XXz6 Video 1: All the CMOS Design Rules are explained. Video 1 link: kzbin.info/www/bejne/mGSsnX5njL98fqM Video 2&3: Glade Downloading, Setup and Configuration. Video 2 link: kzbin.info/www/bejne/gn69ZIJsdtCZqNE Video 3 link: kzbin.info/www/bejne/Z6bIhJykgtKkoaM Video 4: Designing Layout of nMOS and pMOS is explained. Video 4 link: kzbin.info/www/bejne/pYDFnaqma5qKfKM Video 5: Designing CMOS Inverter Layout using 1 metal layer is explained in detail. Video 5 link: kzbin.info/www/bejne/h6OTn4eGpJKFn5I Video 6: Verification of Designed Inverter Layout using LT Spice. Video 6 link: kzbin.info/www/bejne/oafVd2mQq5uMlbc Video 7: Designing CMOS Inverter Layout by using 2 metal layers and Vias. Video 7 link: kzbin.info/www/bejne/fovSoaSIhKdlfaM Video 8: Designing 2 Input CMOS NAND Gate. Video 8 link: kzbin.info/www/bejne/amKTZ2p3jr2SmtE Video 9: Verification of Designed NAND Gate Layout using LT Spice. Video 9 link: kzbin.info/www/bejne/aaHYl41sftOofrM Video 10: Designing 2 Input CMOS NOR Gate. Video 10 link: kzbin.info/www/bejne/qZy8dGWLo6-ah5Y Kindly Like, Share among your engineering friends so that they can also learn from home and subscribe to my Channel for more GLADE Tutorials. Your Support will be appreciated. Thank You
@priyalpatel7635
@priyalpatel7635 3 жыл бұрын
It's really awesome explanations 👍
@merabtufail5016
@merabtufail5016 4 жыл бұрын
Informative
@HimanshuSha
@HimanshuSha 4 жыл бұрын
too goood
@sritulasiadigopula
@sritulasiadigopula 4 жыл бұрын
nice one, but in the last forgot to make contacts of gates, i.e., polysilicon also covered with SiO2
@bowu2094
@bowu2094 5 жыл бұрын
how can you do P-diffusion on specific area without defined the active area by using some kind of mask?
@sanjaytumati
@sanjaytumati 3 жыл бұрын
You are right. It was an oversight on his part. Also photoresist is used in every case of masking
@aaruththiranmanoharan1978
@aaruththiranmanoharan1978 5 жыл бұрын
a quick and easy way to understand the process...really appreciate it
@raviyadav1180
@raviyadav1180 5 жыл бұрын
Best... Among all videos
@PranavMaru
@PranavMaru 5 жыл бұрын
Well prepared
@darthvader5300
@darthvader5300 5 жыл бұрын
A Japanese engineer, a long time ago, told us that CMOS is like making layered cake! But first you must know what kind of IC chip design you want and then proceed to create a plan on how to make it from bottom to top by a simple layering technique. Today with the use of combined maskless ion beam lithography and maskless electron beam lithography using guiding guidance lasers to help pin point precisely where and when to start and end the deposition and welding process combined with precision servo-mechanisms the CMOS cake layering bottom-to-top technique has become quite easy but you must start first by using larger size components and simple designs and compensate by using a much larger silicon chip which is almost the size of a large ID card.
@jeffdaidiot
@jeffdaidiot 2 жыл бұрын
That’s the longest run on sentence I’ve ever read. Lol
@darthvader5300
@darthvader5300 2 жыл бұрын
@@jeffdaidiot Somebody has to say it and write dow in that way for non-scientists and non-engineers and for non-technologists and for non-technically oriented but VERY CURIOUS PEOPLE who wants to know more but are just too afraid to ask the questions that they have without being ridiculed by the specialists and experts. A good teacher must know how to make something really understandable to EVERYONE regardless of their educational background. In that way, you can and will attract people into this field of engineering and technology. By the way, I was once a temporary teacher in the 1990s after my retirement in the 1990s.
@sriramkrishnamurthy4473
@sriramkrishnamurthy4473 2 жыл бұрын
@@darthvader5300 bruh!!
@tarinibishoyee8714
@tarinibishoyee8714 5 жыл бұрын
Very simple easy to understand your video is osm for last minute recall.
@surajjha5300
@surajjha5300 6 жыл бұрын
Good explained...🙌🙋..Upload more videos
@nhmusic1761
@nhmusic1761 6 жыл бұрын
Can you share document in text form ! thank you [email protected]