I am working on same stuff, great content

Excellent!

At 15:12 you show the right side network, indicating Ri is 50 ohms. That baffles me. Shouldn't Ri on the right network be the same as Ri on the left network, ergo 15.2 ohms? Otherwise the method makes sense to me. I'm looking to match a 100-ohm antenna to a 50-ohm IC input at the L1 GPS frequency. Favoring a high-pass configuration.

Thanks for your explanation，but I have a question about the sp simulation vs dc simulation when I used mos as a constant cap（connect body、drain and source，just measure gate to ground cap），I found the dc simulation absolutely different from sp simulation。 The curve tends to go in the opposite direction。 had no clue，In the end, which way can accurately measure the mos capacitor I use in the loop_filter circuit situation？？？

Finding a low capacitor is easy .. but how do i wind 20 microH? ;-)

One thing I'd like to ask, if you ever see this comment, is how would you match the diodes to the feedlines on either side? Say for instance you have diodes that arent already matched to 50 ohms as in your video, I understand how to match the input lines to the diodes ZL, but how would I match the output lines characteristic impedance to the diode? Otherwise great video and I found this very helpful overall.

Great lesson prof: a highway towards BJT knowledge, merci beaucoup :)

Пасиб тебе, мужик

ERROR (EXPLORER-5052): Monte Carlo run stopped because no statistical data generated for the test: SAR:mismatch_CM:1

at 1:59 it should be N+1 as we go from Ibo to Ibn cause that is N+1 terms

Hi Jeffrey, Where can I find the full video?

thank you

should condition for S11 equals gamma_in be Gamma_out, S12 or S21, any of them be zero?

The derivations of Gm and RT are very confusing, especially the KCL at the output node. As stated by @theslippymaster, the source node is virtual ground due to differential symmetry. Hence, Gm and RT should be same as a Common source transistor and not that of a degenerated one. Furthermore, later in the frequency response (lecture 12 part 1), the values of Gm and RT are not as you derived here but instead what I have stated above.

Where do you find the .dds sample that looks like that? Is there any reference in the examples?

Many thanks prof!

Thanks prof

👍

Just want to say your videos are fantastic and have really cleared up a lot. Thank you so much for the effort you've put into this.

I'm having systemverilog code and inside it I have instantiated sub blocks which are also written in system verilog but when I try to use config view, it shows view to use only (which i would keep as external HDL view) for top level and not for the sublocks which are instantiated in the blocks of top level. What should I do so that I can get sub blocks there as well so that I can keep it's view to use as external HDL view

Thank you

Thank you Sir😊 vy=Gm1*vx*(1/sc)=Gm1*(vx/sc)...(1) Therefoe ix=-io=Gm2*(-vy),ix=Gm2vy..(2) Substituting equation (1) into (2) ix=Gm2*Gm1*(vx/sc),vx/ix=sc/Gm1Gm2 So sc/Gm1Gm2=sL L=c/Gm1*Gm2....answer

Anyone here encountering issues where when you save the waveform as image, Cadence will crash?

Thanks for making this! Very clear, understandable and concise. I have been struggling to learn these concepts and this really made it click.

When tuner provides the various impedance to PA output, Pout is measured at 50ohm ( for example, Spectrum analyzer). How we know insertion loss from tuner input to 50ohm Pout measurement point under a specific tuner input impedance in order to calibrate out that insertion loss ?

Hey Mr jeffrey ,Can you please tell which software did you use to record the content ?? The video is very nicely made

First

great

angle H starts at -180

thanks!

could specify which cells are calculated or and which are given values. i'm also trying to make a link budget for a terrestrial link.

Thanks a lot ! I’m a master thesis student and you help me a lot

Great content. Thanks!

if current matching is a concern then Q6 Q8 both must have Vce=Veb

IB0 should also be added giving N+1 term

Ok so the SCTC is for big capacitances llike coupling or bypass and OCTC is for device capacitances.

Bode plots nice

Including ro for last one would have Rc||Rl parallel with r0

Hi, could you please upload or share privately EMX simulation of the transformer? or anything that details out EMX simulation? I am also using 22FDX-PLUS.

Incredibly useful and informative; thank you so much for putting out this tutorial!

Is Rz Cc-CL/Cc*1/GMII actually?

sir, I have a module that I have created with the help of Mosfet but now I want to plot the resistance of my entire module from the input port but here I am using the sp parameter method to get this plot while using the sp parameter i am applying pulse input as my module resistance changes with the number of pulses applied to it so I want to plot the real-time resistance of my module as it changes with time as it is a function of the number of pulses applied so with sp parameter I am unable to get this plot can you suggest any method where I could plot this

Sir, do you have license manager for ADS 2024?

ty

Could you please explain why u use Ps for both loss in inductor and input power?

Hi Professor, many thanks for your video! I am wondering do we need to change the differential port impedance to 100ohm and common mode port impedance to 25ohm for this evaluation? In this way, we can get correlated results as the 4 port evaluation using the conventional equation such as SDD11=0.5*(S11+S33-S13-S31). Thanks!

Excellent video, very precise and concise. Thanks!

Nice 👍😉

It's always a relief when someone who can speak english makes a video 🙏

looking forward your update too ㅠㅠ