Implementing Optimized Quicksort
13:40
Basic Entity Relationship Models
15:01
Direct Cache Mapping
17:09
4 жыл бұрын
Пікірлер
@HappyLocs
@HappyLocs Күн бұрын
you sir are a mastermind beast , thank you.
@santoshkumar8202
@santoshkumar8202 5 күн бұрын
Sorry, I didn't what is the advantage we got from set associative cache to K-way set associative cache?
@huyvole9724
@huyvole9724 20 күн бұрын
Hi RR2=ACk2 ?
@huyvole9724
@huyvole9724 20 күн бұрын
Something missing. You need define Window Size!
@VengatRamanan01
@VengatRamanan01 24 күн бұрын
doesnt the degree of the tree represent the # of keys in the node rather than the child pointers. # of keys min (d - 1) and max 2 * d - 1
@JacobSchrum
@JacobSchrum Ай бұрын
Note: the term "bit stable" used in the video should actually be "bi-stable"
@JacobSchrum
@JacobSchrum Ай бұрын
Around 5:13 the expansion of 5.32 * 10^30 is missing two zeroes at the end. As stated, there should be 31 total digits in the result: 5,320,000,000,000,000,000,000,000,000,000
@rahulshendre7089
@rahulshendre7089 Ай бұрын
thanks man
@santoshkumar8202
@santoshkumar8202 Ай бұрын
Beautiful explanation!
@filippomike8213
@filippomike8213 Ай бұрын
Thank you for your clear explanation! I have a dumb question how do you make sure that both the receiver and the sender know the CRC pattern? because if you send that too it might get affected from errors no? Thank you a lot in advance!
@harissatti8790
@harissatti8790 Ай бұрын
👍
@fullmotioncinema7323
@fullmotioncinema7323 Ай бұрын
Still dont get the math, but I know enough to BS this essay.
@larryvaughn5843
@larryvaughn5843 Ай бұрын
What type of encoding is used by computer network cards sending a signal through Ethernet cabling?
@JacobSchrum
@JacobSchrum Ай бұрын
I don't think there is a single answer for that. Different networks can use different encoding schemes. It's up to what the hardware supports and how it is configured, though standards change and evolve over time.
@Neuroszima
@Neuroszima 2 ай бұрын
wait. Wouldn't be more simple to just use bool instead of this????
@JacobSchrum
@JacobSchrum Ай бұрын
If you are suggesting replacing the entire concept of a semaphore with a single boolean variable, then you are overlooking the fact that updates to a boolean variable in memory are not atomic, and thus do not guarantee synchronization. However, there are alternatives to semaphores that are a bit simpler to use.
@Neuroszima
@Neuroszima Ай бұрын
@@JacobSchrum well yeah, i was trying to understand the differences but i guess i have more reading to do. Thanks for pointing an unobvious thing to me
@daniellino6126
@daniellino6126 2 ай бұрын
Thank you so much, hope I can use this on the exam I have tomorrow!
@memeingthroughenglish7221
@memeingthroughenglish7221 2 ай бұрын
amazing video! would recommend to have a short summary of admissibility and consistency at end though, to better recap what was learned
@Curblunk
@Curblunk 2 ай бұрын
huh???
@wjrasmussen666
@wjrasmussen666 2 ай бұрын
Loved my logic couse at school, so much Prolog as well as Python.
@Huy3ker
@Huy3ker 2 ай бұрын
Thank you very much
@Moka-ot5wm
@Moka-ot5wm 2 ай бұрын
its not pie its pi like pee not fie light fight its fee
@mRahman92
@mRahman92 2 ай бұрын
Pretty cool demonstration of a 4-Bit parallel shift register. Nice touch with the Load signal enable switch. Other videos don't cover that kind of stuff until much later.
@mitchtembo487
@mitchtembo487 2 ай бұрын
Thank you ... This is by far the best tutorial video which clearly explain placement algorithm
@alexk.2361
@alexk.2361 2 ай бұрын
still helping students in 2024, thanks man
@kal.
@kal. 2 ай бұрын
what software did you use for these diagram?
@JacobSchrum
@JacobSchrum 2 ай бұрын
www.mural.co/
@PersonalEmail-ot1bq
@PersonalEmail-ot1bq 3 ай бұрын
Lets get lost tonight, you could be my black Kate Moss tonight, play secretary I'm the boss tonight, and you don't give a f*ck what they all say right. 😂
@hamdaniibrahim8693
@hamdaniibrahim8693 3 ай бұрын
ESI
@jirkadolezal8127
@jirkadolezal8127 3 ай бұрын
thank you
@kjolen
@kjolen 3 ай бұрын
Thank you for the explanation!!
@SYEDABDULALISHAH
@SYEDABDULALISHAH 3 ай бұрын
Thank you so much sir. You've covered all topics in just 10 minutes. Thank you So Much. I am grateful to you
@abellacherabah6284
@abellacherabah6284 3 ай бұрын
Thank you professor
@nitinagrawal6637
@nitinagrawal6637 3 ай бұрын
Thanks for nice explanation. I have doubt about if both CPUs issue write request to the same data location, then how it is resolved? As it seems to be the race condition then do I need to synchronize this scenario or what?
@JacobSchrum
@JacobSchrum 3 ай бұрын
It absolutely would be a race condition, and you would need to assure correct behavior with synchronization at the level of code. However, this coherence protocol would assure that any subsequent reads make sense, meaning that you can't do two simultaneous reads and get different values.
@nageb.khateb
@nageb.khateb 3 ай бұрын
awesome 👏
@user-pk6eu9lj4f
@user-pk6eu9lj4f 3 ай бұрын
really good explanations
@zakylib
@zakylib 3 ай бұрын
Thank you. Thank you. Thank you. Evrythign just makes sense now.
@BillyOGrady
@BillyOGrady 4 ай бұрын
Very helpful. Thank you!
@VictorHamzat
@VictorHamzat 4 ай бұрын
After 8 years, It's still on point!
@isaiahhiggins
@isaiahhiggins 4 ай бұрын
I missed this lecture and was totally clueless when we had to manually calculate a frame check sequence. This is exactly what I needed, and probably explained more clearly than the professor too! Thank you
@koustav2826
@koustav2826 4 ай бұрын
When CPU 1 performs the Read operation will it fetch the new data which is modified by CPU 2 or it will get the old data that was there before CPU 2 modified it?
@nitinagrawal6637
@nitinagrawal6637 3 ай бұрын
If CPU-2 modifies the data then it will invalidate the data with CPU-1, so CPU-1 will be fetching the data from CPU-2 cache.
@thandoemmanuel8863
@thandoemmanuel8863 4 ай бұрын
University of Limpopo was here 🔥🔥🔥2014
@safaaali2151
@safaaali2151 4 ай бұрын
❤❤❤❤❤❤❤
@DhananjaySureshGade
@DhananjaySureshGade 5 ай бұрын
In Invalid state, does modified cache update the memory or it will just update the another shared cache?
@JacobSchrum
@JacobSchrum 4 ай бұрын
If a cache entry enters an Invalid State, then its contents will never be written back to memory. A cache line enters an Invalid state when the shared data is written/modified within another cache. So, the cache contents that eventually get written back to memory will come from a Modified or Shared cache line that corresponds to the same one that was Invalidated in some other cache.
@mengstudesale
@mengstudesale 5 ай бұрын
work ip address
@JamesBiser
@JamesBiser 5 ай бұрын
Teach at Penn State. Please. COMENG 362 needs you brother
@user-um8qs6vs5z
@user-um8qs6vs5z 5 ай бұрын
Thank you sir
@5743363
@5743363 5 ай бұрын
Here is the values for the parameters in the equation, for who still cannot link up the action demonstration and the equation: 7:08 Given: gamma = 1, alpha = 0.5, The cost refers to r_action = -0.04 Let s = (bottom left corner) denoted as [[0,0,0,0], [0,0,0,0], [1,0,0,0]) (as long as you can identify the location) a = UP Q(bottom left, , UP) = 0 + 0.5(-0.04 + 1*0 -0) = -0.02
@htyvty9981
@htyvty9981 5 ай бұрын
I'm so glad I found your channel. Thanks for sharing
@georgedan4925
@georgedan4925 5 ай бұрын
perfect explanation .thanks mate
@abzx.
@abzx. 5 ай бұрын
im cooked
@plastilinovbly
@plastilinovbly 5 ай бұрын
This is the best video on the topic, thank you! I finally understood it:)
@eladpollak123
@eladpollak123 5 ай бұрын
Great!