so why reg[6:0] fifo_counter . should it be [7:0] ?
@anupammathur175 ай бұрын
In my opinion at 23:30 , fork-join would be a better option to execute if conditions for both Head and Tail pointers simultaneously. Otherwise the compiler might execute the first if-else block first and then the second if-else block.
@ChiragHadiyaCreations8 ай бұрын
Nice explaination b
@vcubeful11 ай бұрын
rd_ptr and wr_ptr shouldn’t be of 6 bits to count till 64, with this example max value of rd_ptr and wr_ptr can go up to 16. Please correct me if I am mistaken here.
@manishsrivastav48973 ай бұрын
whom you are explaining 😂
@bktripathi6528 Жыл бұрын
in first always block,in senstivity list only input will define .how u define output in sensitivuty list??
@SusanthaWijesinghe-xp8rw Жыл бұрын
buf_full signal should be asserted when the fifo_counter is 63, not 64 because it counts from 0. Therefore the statement should be corrected as "buf_full = (fifo_counter == 63);"
@sayantikaroy9388 Жыл бұрын
The counter is initialized as 0, so it is counting from 1, so it is correct.
@suryas72627 ай бұрын
No bro it has to be corrected to 63 , there initialized as 0 but after coming to 0 only it starts the count so it needs to get corrected
@korimillalaxmi7628 Жыл бұрын
Is this Hdl code Or VLSL
@mcb6331 Жыл бұрын
Very simple but informative video.
@LucyLiu-qm1uw2 жыл бұрын
Clear explaination. Pretty helpful. Thank you very much. :)
@DooPardoo2 жыл бұрын
excellent video
@vinayakvakare98362 жыл бұрын
simple and clear explanation , extremely helpful
@rashmits18342 жыл бұрын
Please add video for and code for asynchronous FIFO
@ayushuniyal70352 жыл бұрын
his lecture are in udemy
@noniusreccaredus2 жыл бұрын
In the Verilog code the pointers are declared as: reg [3:0] rd_ptr, wr_ptr; shouldn't they be declared as: reg [5:0] rd_ptr, wr_ptr; So when they reach 63, then they are automatically set to zero when incremented again?
@abhishekshankar11362 жыл бұрын
its actually reg [5:0] cos 64 mem locations
@korimillalaxmi7628 Жыл бұрын
@@abhishekshankar1136sir can you plz give the test bench for above fifo code
@faisalanas77783 жыл бұрын
Pls keep uploading in this domain
@vanshika63843 жыл бұрын
What is the benefit of using circular buffer ??
@noniusreccaredus2 жыл бұрын
You mean instead of using a shift register, for instance?
@jayashreemm24913 жыл бұрын
sir can u share the code for different read and write clocks
@unnatishah54573 жыл бұрын
Can you share a tutorial on asynchronous FIFO counter?