Excellent video, when you say active region of the MOSFET are you refering to triode region? Thanks
@guillermomaciasrojas79123 ай бұрын
I think you made a mistake at 17:27 , it should be gm=2/Rp
@TheBhushan4143 ай бұрын
Thank you very much for the videos Susanta. I tried making excel sheet by my own and really helped me in total understanding of the two videos you posted on LC VCO.
@hobuth4 ай бұрын
wondering about the 7dB he is adding to ADC op dBm: Pin dBm =10log( (V^2(rms)/R*1000) ) = 10log(Vp^2 * 1000/(2*100) ) = 10log(Vp^2) + 10log(1000/200) = 20log(Vp) + 7dB
@changguo-h7k4 ай бұрын
at 52:35, why the Av is sqrt(L/C)/50 ?
@vicever083 ай бұрын
NF estimation will be 1.6dB
@rammohanrao27857 ай бұрын
Please make a video on design of Power amplifiers
@RohitDwarkadasApurvaee23m5617 ай бұрын
Hi Susanta, we havent heard you in last 5+ yrs. Please upload more video on latest technology, IC sub block designs etc. Hope we will listen once again.
@sujaljain2548 ай бұрын
1:05:29
@CoreyMckee-t7f9 ай бұрын
Thanks your videos -from china
@kshitijmohan76399 ай бұрын
Please do a video on power amplifier design methodology
@sayalijoshi5010 Жыл бұрын
Hello Sir, I have a doubt. What if we skip the cap bank and use only the mos varactor. How will it affect the circuit?
@mogantiganesh7191 Жыл бұрын
Very Ex-ordinary work bro. Thank you for your support, bro.
@verilog123 Жыл бұрын
Good lecture suitable for experienced designers
@srijanisallyouneed Жыл бұрын
Hello Sir ❤ , Please upload more topics in such a lucid way
@ee.linzhang Жыл бұрын
What does ACPR stand for?
@socialogic9777 Жыл бұрын
I watched this over 4 days and it was so much worth it. The intuitive techniques are a necessity when getting lost in long derivations and unable to interpret the results is a reality.
@socialogic9777 Жыл бұрын
AC ground gets created due to splitting of vin at 3:03:36, i didn't understand?
@utubevenky Жыл бұрын
yes the common node doesnt see any "ac signal" or small signal, in other words even in AC or tran analysis it will remain in the same voltage(= the DC voltage) that you see in the operating point analysis
@ravuruvasudevareddy Жыл бұрын
Thanks for valuable info sir (at free of cost)...Those who are having little bit knowledge about MOSFET , Cadence & Op-amp design ...then they will definitely fall in love with ur teaching ...just like me...
@justhereforcomments6880 Жыл бұрын
Extremely insightful . Great work
@ytaccount9420 Жыл бұрын
Please could you make more such videos
@creativeworldwithhibbafarm12102 жыл бұрын
This explanation will never get old. Please keep sharing your design experience with such lectures
@jairajnaik98722 жыл бұрын
How come cdso is from drain to gate ? Shouldnt it be cgd ?
@TheNarfypoit2 жыл бұрын
Also, are you sure the expression you arrive at in 3:39:14 for the zero frequency is correct? Most analyses I've seen of the frequency response of the 5T OTA place the zero at ~ -2gm5/C2; i.e., twice the mirror pole frequency, *and at the LHP*, not RHP.
@TheNarfypoit2 жыл бұрын
Dear Sir, thank you for sharing knowledge, and for the excellent method of delivery. Minor notice: From 2:58:16 onwards as you showcase the differential amplifier schematics; it is important to note that your output nodes' polarities should be reversed. Your diff pair devices are still common source amplifiers, so it stands to reason that the polarity of output node at D of device will be of opposite phase to input at G of device.
@soumenmohapatra42422 жыл бұрын
Very nicely explained sir..
@jianhaowu73682 жыл бұрын
Did you intentionally add this background noise to let people know how important the LNA is?
@RohitKumar-me8fq2 жыл бұрын
THANKS FOR SUCH A EXPLANATORY VIDEO......CAN YOU PLEASE suggest or make a video on how to simulate the same design in cadence at 45nm technology.......
@amirshahzads49392 жыл бұрын
can you please tell me when you calculate the Rp you do not enter the unit scale values like (Ghz,nH etc) .what was the reasons.
@안효민-g3k2 жыл бұрын
This video is a GEM. The lecture notes look a lot like how Prof. Asad Abidi teaches analog circuits!
@LightningHelix1012 жыл бұрын
Thank you for sharing your notes and talking through them. So many resources focus on the multitude of possible schematics that the details get disjointed across the entire piece of literature if they are included.
@robertwelland50962 жыл бұрын
Really clear exposition.
@changhsiao21322 жыл бұрын
Thanks for the great presentation, very well explained, especially the noise portion!
@paulktemplar2 жыл бұрын
Is Cgd in parallel with Cgs?
@ofirfedida2522 жыл бұрын
Hi Susanta, these lectures are so great, thanks a lot for you effort, i wish you can post some more videos or please direct me to some material you wrote, like the TX chain maybe some ADC aliasing and other. again thanks you very much
@alexsu91022 жыл бұрын
Spectacular.
@multi-talented79862 жыл бұрын
Extremely Helpful videos. Could you please make a video for transmitter system based design as well?.
@chenhu53172 жыл бұрын
thanks a lot for this clear and thorough explanation
@georgematthew12 жыл бұрын
Thanks to you and all who make educational videos
@hemantshankhwar80962 жыл бұрын
please give video how to design this vco In cadence
@syamkrishnakv10518 күн бұрын
hello did u get it?
@hemantshankhwar80962 жыл бұрын
how to design cap bank in cadence vertuoso software
@LionHPshorts3 жыл бұрын
Sir please provide high frequency (8- 10 gHz) phase locked loop video
@Shiny_Mewtwo3 жыл бұрын
Thank you
@rahultheytv53473 жыл бұрын
fantastic video thank you for sharing info
@shaikmahammadsharif85063 жыл бұрын
great explanation . thank you sir.
@shaikmahammadsharif85063 жыл бұрын
can you please provide the pdf link for the reference . ? i mean hand written pdf .
@rajnisudan39803 жыл бұрын
Hello sir... Can u please mail me the file at [email protected] This would be a great help Thanks