28 күн бұрын
2 ай бұрын
Пікірлер
@udaychauhan395 4 күн бұрын
Great work ❤❤
@srijanisallyouneed 7 күн бұрын
Can anyone tell why we did this calculations in Z domain? why not in frequency domain or other? please elaborate....I cant understand? what are the benefits of doing cal. in such a way??
@ashishnemalapuri8218 10 күн бұрын
Inverter is a disputed property...😹
@RutvikPatel-pn2nj 12 күн бұрын
Please upload DAC videos also... this is very good lecture series
@RutvikPatel-pn2nj 14 күн бұрын
Really like the way you teaching .. usually we feel sleepy while watching NPTEL videos but this is great
@RutvikPatel-pn2nj 15 күн бұрын
Simple and great explainantion
@sabikuibrahim8015 15 күн бұрын
How do you know the current required in the network you want to bias (like the 1mA in your example)
@robinahmed4003 16 күн бұрын
Can you upload lecture 2,3 please?
@parth4658 18 күн бұрын
can someone clearly explain me the other pmos switch attached at source of n mos Vp and Vq
@LucasMabel-d6v 24 күн бұрын
Alfred Ford
@PratikChakane-c1x 25 күн бұрын
what is the name of the professor?
@sanchitmukherjee2410 10 күн бұрын
rs ashwin kumar sir
@srijandwivedi294 26 күн бұрын
20:45
@naidutangi9992 27 күн бұрын
will single inverter followed by RC work as oscillator..?
@devakisivakumar2090 27 күн бұрын
Nice lecture
@devakisivakumar2090 27 күн бұрын
Super lecture
@SrijanChakraborty-vr4qs 29 күн бұрын
Awesome Lecture Series✌
@arunpandian294 Ай бұрын
Greetings Professor. At 36:37 the pMOS has little to no Vsd. Vy (Drain of pMOS) is at VDD (almost) and Source of pMOS is also at VDD, that should yield a Vsd ≈ 0 V. Shouldn't that make the current ≈ 0? Even with the Vsg ≈ VDD, Source and Drain are almost shorted and no current should flow. But, how are you saying that it will conduct current? Can you clarify this?
@parth4658 18 күн бұрын
there is a switching pmos whose gate controls the Vx or Vy voltage to be Vdd or not when switch is on Vx and Vy will be at VDD so no current flows it is the reset period in the comparison period the switch is off so there is no fixed voltages at Vx and Vy at that time current flows and positive feedback regeneration happens
@ShubhamJaiswal-i3y Ай бұрын
Hello sir…. Please upload 2024 notes
@aerodynamico6427 Ай бұрын
Most hopeless lecture in the series so far.
@devakisivakumar2090 Ай бұрын
Good lecture
@devakisivakumar2090 Ай бұрын
Good explanation
@devakisivakumar2090 Ай бұрын
Good lecture
@planflux7703 Ай бұрын
Very well presented!
@devakisivakumar2090 Ай бұрын
Super explanation
@devakisivakumar2090 Ай бұрын
Super explanation 👌
@waleedelshawadfy8218 Ай бұрын
Great explanation.👏 Does this course have resources (Lecture slides, practice problems, Labs, etc.) If it does please can you send the link 🥺
@MohammadKhorshidian Ай бұрын
Thank you for your video. When you show that time interleaving images gets canceled (let's say for the case of 2XTI), you use fs/2 as the frequency to calculate the phase for the second sub-ADC, 2pi X f X Ts = 2pi X fs/2 X 1/fs = pi and hence e^jpi = -1. But when the tone is at fs/2+fin why you don't use fs/2+fin?
@ecestories8816 Ай бұрын
Can you explain pnoise also for comparators?
@SrijanChakraborty-vr4qs Ай бұрын
Can Anyone elaborate what sir explained in 10:09 *why we need to gnd the negative terminal of Comparator* ?
@2602Lisha Ай бұрын
Nice lecture
@ecestories8816 Ай бұрын
Explained in a lucid way. Thanks Sir.
@rva485 Ай бұрын
Hi 2,3 lecture missing
@anmiecv Ай бұрын
good concepts!
@sohamlakhote9822 2 ай бұрын
Thank you so much for such a brilliant lecture :-)
@surajkulkarni6868 2 ай бұрын
Prof Ashwin is the new GOAT. What mastery over circuits. He literally went ground up. Big thanks to him & IITK.
@sankalp_02171 2 ай бұрын
These are some of the highest quality lectures which explain complicated topics in a simple way. Thanks to IIT Kanpur SSCD group for making these lectures publically available.
@宋子奇 2 ай бұрын
how about Chinese？
@programacion3694 2 ай бұрын
owo
@SAhellenLily 2 ай бұрын
At 31:23 The circuit which called loop gain of BG core circuit Av=-2gmn(1/gmp)/(1+2gmnRs)*(-gmp*(1/gmn)....Answer
@gopukrishna521 2 ай бұрын
Sending thanks from IIT Delhi, I was stuck on the slicer, and had reached a roadblock. Your lecture really helped me move further.
@surajkulkarni6868 2 ай бұрын
This is god level CMOS analog design course. Major win for the professor & IIT Kanpur.
@devakisivakumar2090 2 ай бұрын
👍
@devakisivakumar2090 2 ай бұрын
Super
@devakisivakumar2090 2 ай бұрын
Super lecture
@devakisivakumar2090 2 ай бұрын
Super lecture
@ecestories8816 2 ай бұрын
great video
@surajkulkarni6868 2 ай бұрын
So surprised by the complexity of frequency response of "simple" common source amp.
@Pozo_caliente 2 ай бұрын
good classes
@ravichanderb608 2 ай бұрын
Good explanation.