how we can do for implementation can u plz make a video?
@kaverihatti686Ай бұрын
Thank you for sharing your knowledge, if you show the implementation, then its helps a lot, thank you once again.
@alexandrei719Ай бұрын
Could you share the project codes?
@muhammadbilawal8417Ай бұрын
i am continuously noting that you are using ZYNQ IP without any reason just to common clock with other signals. there is no sense to use it.
@aimanalqassab8556Ай бұрын
CAN YOU MAKE BY USING ZEDBOARD
@ThePakistaniInsider2 ай бұрын
hi could you please make video for 12 bit DAC ,configuring spi interface
@marwanal-yoonus2803 ай бұрын
@marwanal-yoonus280 0 seconds ago Dear Sir Please, I have a problem during reading the status of an output switch on Zybo Z7-10. I use Vitis to program the Zynq processor with Gpio connected to a slid switch. I make the switch (input2) status as a condition as shown in the program below if (D == 1) ; The following program works only when the input2 signal that was connected to Gpio IP starts from ("1") but the program does not work when input2 signal starts from ("0"). ////////// while (1) { D = XGpio_DiscreteRead(&input2, 1); // input2 from a slide switch if (D == 1) { sum_all = XGpio_DiscreteRead(&input, 1); // input is a 32-bit data printf("%x " , sum_all); sleep (1); } else { XGpio_DiscreteWrite(&output, 1, 0); // output is a LED printf("No_Signal "); sleep (1); } } ///////////// i.e. the program works only when I change input2 from "1" to "0" but does not work when the input2 start changes from "0" to "1".
@AbdulBasit-r9x3j3 ай бұрын
I am new to FPGA .Can i get the code as well as description such that i can learned about each line
@RajendraChikkanagouda3 ай бұрын
pls send the c code
@PakDaisy3 ай бұрын
Can you share code
@Albert-zsh5 ай бұрын
Hi, How can we get the code you used? Can please you send us? Thanks😊
@Dilipkumar-qc3cu5 ай бұрын
Sir can you share me code
@YAHYAMOHAMMEDSINJABTMB5 ай бұрын
really appreciate the amazing work, i would like to ask for the code please. Thanks again for the effort.
@benjacordova24555 ай бұрын
Hi, can you send me the code plisssssssssssssssssssssssssssssssssss, im in a hurryyy , plissssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssssss
@utube4anbu6 ай бұрын
how to control amplitude of sine wave?
@eyupyaka85726 ай бұрын
Could you share code of the project?
@AdvanceZYNQseriesFPGAprojects6 ай бұрын
Yes sure
@eyupyaka85726 ай бұрын
@@AdvanceZYNQseriesFPGAprojects could you share your email for contact? Actually I do not want to share mine with other person :)
@eyupyaka85726 ай бұрын
@@AdvanceZYNQseriesFPGAprojects libraries that you used, where can I found them? I have found when building project on my xilinx SDK program
@afzalmaqbool4496 ай бұрын
is there any way i get this code and gui file?
@alexmarrero27 ай бұрын
Terrible video
@lalithashutosh33568 ай бұрын
Hi sir, great content it helped me a lot. Is there way to reach out to you, as have some doubts in procedure and it be greartly indebted to you for your help.
@VinayMarpula8 ай бұрын
hi
@sakthilakshmi97858 ай бұрын
I want to transfer or send the hexadecimal file via ethernet TCP protocol, how to change the code by using LWIP TCP server and client processor
@RiyaKori-g6u8 ай бұрын
hey thankyou for the amazing video !!!!! you really putting a very good efforts in making this project . thank you for sharing this video . could you please provide the code it would be a great help.😊
@MikeAnth8 ай бұрын
Audio is nul for this video.
@Corey-lu4rj9 ай бұрын
Hello,Could you please send me a copy of this Hello-word TCP example?
@qwerty_____1469 ай бұрын
❤🎉🎉
@ManoharManduka9 ай бұрын
Thanks for the video , could you please share the code?
@varshav69710 ай бұрын
Hello@Advabced FPGA & Digital Electronics.Can you send the code ??
@AdvanceZYNQseriesFPGAprojects10 ай бұрын
Please inbox me
@patricksutton896510 ай бұрын
Well explained. Only thing I am having a problem with is the bit width coming from your DDS compiler. In your previous video, the DDS compiler was only 16 bit width but in this bit it was changed to 32 bits. I do not seem to have the option to configure the DDS to 32 bits.. maybe we have a mismatch in versions of Vivado? I don't believe my output is correct with only the LS 16 bits being inputted into the 32 bit FFT data port. Would like to hear your input.
@patricksutton896510 ай бұрын
I think you may have added sin/cos functionality instead of just sin? That does make sense for FFT analysis
@RiyaKori-g6u10 ай бұрын
Hello can you please share the code
@AdvanceZYNQseriesFPGAprojects10 ай бұрын
Please inbox me
@monsiw8 ай бұрын
@@AdvanceZYNQseriesFPGAprojects Hi, I also wrote you an email, please check
@RamavathKavitha Жыл бұрын
Could you pls share the code
@annihalatorjames3061 Жыл бұрын
Please send code, thank you.
@nashatali6030 Жыл бұрын
another great video👍👏 thanks i have two questions 1- can you explain the calculations you did at the end of the video to get 4085 ? 2- why you used m_axis_tuser and not m_axis_tdata ?
@yabh19342 ай бұрын
I my version the tuser port is disable. What would be the alternative solution?
@displaylab-i1i Жыл бұрын
code
@monsiw Жыл бұрын
Hi, I watched some of yours FPGA movies and I was wondering if you have github with source files :)
@amulyakamalapuram3906 Жыл бұрын
can i get the code
@Shruthi_Madanu Жыл бұрын
Hello! Will the flash retain the loaded program after i disconnect and reconnect the usb cable? Could you please say?
@AdvanceZYNQseriesFPGAprojects Жыл бұрын
Yes..flash behaviour is like that only..it retains the loaded program..after power on off.
@Shruthi_Madanu Жыл бұрын
Oh, thanks a lot for confirming🙂
@Divya-m6v Жыл бұрын
hello @Learning Advanced FPGA , i need your help with the ethernet connection establishment , can you pls send me the "xaxiemacif_physpeed.c" ,it would be very helpfull to me.
@AminaFarooq-z4t Жыл бұрын
Can you please share the codes.
@AdvanceZYNQseriesFPGAprojects Жыл бұрын
Please share ur mail or inbox me
@AminaFarooq-z4t Жыл бұрын
I have sent you an email on your email address
@amirhosseinnikravan1697 Жыл бұрын
where is the code?
@AdvanceZYNQseriesFPGAprojects Жыл бұрын
Code is payable..please inbox
@aneeshsathyaradha2472 Жыл бұрын
Please share the code.
@AdvanceZYNQseriesFPGAprojects Жыл бұрын
Code share is payable.
@mariemmakni4479 Жыл бұрын
could you please share the code? thanks
@divyalakshmim2525 Жыл бұрын
Is it possible to do image convolution using FIR compiler IP Core?
@yarenkaya7872 Жыл бұрын
Is there anyone who is interested in generating sinusoidal without using Zynq and in VHDL not Verilog?
@suzaa6868 Жыл бұрын
I cant find sdk in the software ? 🙄
@AdvanceZYNQseriesFPGAprojects Жыл бұрын
Which version ur using?
@hirywankam4616 Жыл бұрын
Thank you for sharing. could you share codes please?
@syliaamarouche3386 Жыл бұрын
Thnak you so much for this video, can you please share the code ?