Thank you, very useful

How to see those file in windows? .s .o etc

Hi how I can move or copy data from a 16bit buffer to an 8 bit buffer?

YO ME VOID👀👀👀

Why is the output pulled to ground when a gate voltage is applied and nothing is connected to drain?

Nice!

Super bro

very informative my 5 year old son got graduated using ur tips😳😘😘😘

Yast Chutiya Patrakaar Jo Ghushyaha party ko Jhole hun Yiniharu ko interview Nadinu hola. Yee partrkaar Haru GORU, BHENDA hun.

Brother.... Beautiful explanation. Learnt lot... God Bless you. Thanks

Figer galat banai hy 1,pin no ¹ per graond hy Jabkh pin 8 per graond hy students canfuz ho jaengy

thank you so much. it's an excellent tutorial

Are most big companies using the SCRUM / Kanban methodology (or framework) to satisfy the AGILE/Waterfall/V-Model philosophy (SDLC) ? I'd like to move away from a rapid-prototype environment to something more formal in order to develop high quality/safe products containing embedded software.. for ANY industry.. Aerospace (like Lockhead's SEAL Level X, Boeing , DDPMAS, DAL A to E etc) , Medical or Nuclear industries.. even Automtovie. I'd love to see a trivial project example that shows all the steps and outputs. For example, assuming I document the process on how the code is generated, what constitutes proof that it's safe? Static Analysis? Code Coverage - Statement (Level C), Decision (Level B), MCDC (Level A)? Who defines the unit tests? I imagine there are differences between the industries.. FAA : DO-178X , DO 331 , ARP4754A , ED-12C FDA : 13485 , ISO14971 , IEC 62304 , SaMD and DOE Nuclear : 414.1x, (Automotive : 26262) but what are the typical tools/software needed, and the typical document/artifacts in the various stages of the software life cycle? I saw a good video by CEMILAC Education Program "Airborne Software Development & Certification Process" and it's a bit overwhelming: Requirement Management - (IBM Ration) DOORS, JAMA, Xebrio, rmtoo florath , doorstop-dev / doorstop , reqview Static Structural Source Code Analysis - Parasoft, PolySpace, CodeSonar, horusec , SonarCloud, veracode PREFast, TBrun, LDRA Dynamic Analysis / Modified Condition/Decision Coverage (MC/DC) - VectorCAST, RapiTest Traceability Tools: Reqtify , Polarion , McCabe Configuration Management / Storage and Version Control System - Git, SourceSafe, Mercurial, MS TFS, ClearCase QA / ALM- Helix ALM for Managing Artifacts, Establishing Traceability, Documenting / Enforcing Processes, etc (I)V&V / Unit Test Automation - VectorCAST, LDRA Testbed , Mathworks Simulink DO Qualification Kit Continuous Integration / CD - Continuous Delivery/Deployment - Jenkins, Bamboo, or GitLab CI/CD And what is the general attitude towards open source software (ex. FreeRTOS) and code-generation tools (ex. ST's Cube MX)? Also, how do CPLD and FPGAs fit in to the embedded software picture.. since not exactly software nor hardware, since they are programmable devices written in an programming language like VHDL , (system) verilog , Amaranth HDL ? How would DO-254 apply to HDLs?

Need more programs

Perfect!

Great video ❤

You were very clear - Many thanks !

helpful

Great quick summary. Thanks. I'm sorry KZbin isn't feeding you more hits!

UART are not rated in baud/sec but bits/sec!!!

Very clear thank u😊

At 1:56 I don't understand how the P-MOS can be activated by the 1. If '1' is logic high (3.3V/Vcc), then the voltage of the gate relative to the source (Vgs) is simply 0, and the P-MOS is not conductive. To activate the P-MOS, Vgs needs to be negative -- that is, the gate voltage would need to be logic low (0V/GND) while the source voltage is 3.3V/Vcc, meaning Vgs = -3.3V. And again, at 2:21 , if there is 0V on the gate of the P-MOS, the P-MOS will activate due to the negative Vgs, which means both mosfets will activate and Vcc and GND will be 'shorted' by the connected drains. What am I missing?

too good

can you send the ppt bro?

very nice content!!!

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Use XOR if .. interviewer ask without temporary and arithmetic operation

Great

Very helpful

Well explained. Thank you.

god amongst men

yahhh i think embedded system is better then to full stack java and python

Don't teach the wrong, multimaster mode is possible in spi and we can also use spi with only two pins

Bc pura suljha hua uljha diya😅😅

Oh god! Fucking love you!!!

can u please share the ppt's

can please share the pdf ?

Unit testing and integration testing is not for validation testing it's for verification

Helpful content. Thank you 🙏

Thank you so much 🙂

Thank you! Explained everything in a simple and clear manner, very beginner friendly. Will subscribe!

Give me your contact

nind aagyi yr

Thank you so much sir... very helpful information 😊

Hi everybody, I have a Honda civic 2010 coupe is false error link when I setup ODB2 scan then I probed CAN-H and CAN-L look ok but L-line is a straight line 9 volt dc, it has no wave form during ignition is on or engine is running. I am not sure what it should look like before I continue to chase it down to find the problem. Anyone has any suggestion please!!! thank you every much. I don't want to bring it to the shop or dealer because the value of my car might be cheaper than the cost to repair.

superb explanation

bro, you are prefect at explaining, I learned can bus Amazingly by your videos even though they haven't subtitle; niceeeeeeeeeeeeeee

Can u plz also explain the how to develop driver for these protocol

Crisp and clear 👌