#5 DC gain of one stage NMOS circuits

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Analog Snippets

Analog Snippets

5 жыл бұрын

This video discusses the DC gain of four single stage NMOS based circuits. These circuits differ in the placement of current source and resistors. Video describes intuitive way of arriving at gain equation rather than solving the network equation. This question was asked in one of the job interview. This question tests the basic understanding of circuits and how one approaches a given circuit. Video ends with a circuit to think about.

Пікірлер: 11
@abhiruplahiri1
@abhiruplahiri1 5 жыл бұрын
For the last question, considering RL, Rs1, boils down to -RL/Rs, so a simple inverting amplifier (analogous to the op-amp based inverting amplifier). We can also apply the input signal below Rs (at the present ground) and then interestingly it acts as a non-inverting amplifier of gain RL/Rs.
@analogsnippets
@analogsnippets 5 жыл бұрын
True and good observation about non-inverting Amp.
@abhiruplahiri1
@abhiruplahiri1 5 жыл бұрын
In Part 4, another asked question is when Vout is taken across Rs (at the source of the MOS and not the drain). Then the voltage gain is zero. To make it work as a source follower, drain should be low impedance (
@analogsnippets
@analogsnippets 5 жыл бұрын
Yes, that's true...
@98505177229850590818
@98505177229850590818 5 жыл бұрын
Abhirup : can you please elaborate why drain needs to be at low impedance ? i didnt catch that ..:)
@ketansharma8094
@ketansharma8094 4 жыл бұрын
@@98505177229850590818 Impedance looking in from the source in circuit 4 for an ideal current source is infinite, which means no small signal current can flow in that path, since Rs is in series with it, no signal current flows in Rs, therefore gain from Vin to Vs is 0. Now add a resistance in parallel to the current source and keep on decreasing its value, you'll see that now a signal current will flow into Rs and as the resistance in parallel to current source goes to 0, it becomes classic source follower or common drain amplifier.
@aniketshelar2954
@aniketshelar2954 5 жыл бұрын
Last circuit: gm(Rd//ro)/(1+gmRs)
@analogsnippets
@analogsnippets 5 жыл бұрын
Yes that is approximately correct. More precise answer would be: gm{Rd||(ro(1+gmRs))}/(1+gmRs). That is because output resistance will also be increased by source degeneration.
@aniketshelar2954
@aniketshelar2954 5 жыл бұрын
@@analogsnippets yes correct. Thanks a lot for the insights. Keep making such videos. Great work!
@98505177229850590818
@98505177229850590818 5 жыл бұрын
@@analogsnippets you meant RL instead of Rd
@analogsnippets
@analogsnippets 5 жыл бұрын
Yes, that should be RL, the load connected to drain.
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