3 bit down counter | asynchronous counter | down counter in hindi | ripple counter

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#counters #asynchronousdowncounter #3bitrippledowncounter

[@zainfarooqui9319]

The way of teaching and explaining so good. I am preparing for my exam just before 3 days before the exam date. May you keep this way of teaching and helping students. From Pakistan.

[@simplicity3792]

The way you explain really helps me a lot..... Overall my doubts cleared after seeing your videos..... keep ot up.....all the best. and please provide mcq based questions on overall syllabus that will really help us for exam. please its a humble request.....

[@komal31]

Thanks a lot ma'am for helping me in my viva and end sem exam🙏🙏

[@growwithtech1728]

Thank you ..so much And love you mem

[@sadhavmittu1848]

Very nice explaination mam

[@mohitmehta7450]

Agr hm positive edge le to down counter or negative edge le to up counter aayega na agr diagram same hai to mam plz rply

[@aasaanpadhaai]

No...upcounting means incremental counting....means0,1,2... And so on Downcounting means decremental counting 7,6,5,....

[@mohitmehta7450]

@@aasaanpadhaai ok thank uh

[@simplicity3792]

you mean that if we have given clock pulse initially as 0 then it is down counter and if clock pulse initially is 1 then it is up counter may it is negative edge triggered or positive edge triggered never minds....?? please reply...

[@mohitmehta7450]

@@simplicity3792 no

[@sonalisahu4249]

The best

[@rishavsaha5841]

op explanation 🫡

[@heroicme6982]

Where is clear?

[@kushsahu5302]

🙏🙏

[@mahendersinghrawat6290]

how to identify up or down counter inasynchronous coynter

[@starkendeavours7072]

If -ve edge-triggered CP from Q as o/p is connected to next to i/p of another FF, then it's Asynchronous Up Counter. If +ve edge-triggered CP from Q as o/p is connected to next to i/p of another FF or if -ve edge CP connected from Q' to next of i/p of another FF then it's Asynchronous Down Counter. Hope it's Clear...