Algorithmic Level Techniques for Low Power Design

  Рет қаралды 19,139

VLSI Physical Design

VLSI Physical Design

Күн бұрын

Пікірлер: 7
@meerapatel8040
@meerapatel8040 4 жыл бұрын
Usually, I avoid doing comments on videos but after seeing the efforts of this professor, I'm so impressed by his level of understanding. I must say he is a great teacher.
@advaitshukla7701
@advaitshukla7701 Күн бұрын
11:05 Sir the delay is not synchronized because if the inverters. How can you say so?
@sisirpynda5875
@sisirpynda5875 2 жыл бұрын
thank you sir for this course ... i learnt so much!!!
@StayInBliss
@StayInBliss 5 жыл бұрын
A grt teacher
@lharikrishna2011
@lharikrishna2011 6 жыл бұрын
Nice
@SagarKumar-lc4cl
@SagarKumar-lc4cl Жыл бұрын
Lec 63
@sdeepak6555
@sdeepak6555 9 ай бұрын
A & B techniques are valid , but A is a subset of B...But the problem is example given in C isn't practical...depending on whether Si or Sj being the initial state the other wouldn't exist
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