Assembly Basics - Part 1 : Processors and Registers

[@maxmuster7003]

Why is esp and ebp not divided into lower parts(sp and bp) in the table of 32 bit register?

[@NeXuSInfoS3c]

@@maxmuster7003 Registers like AX, BX, CX, and DX were historically used for general-purpose operations, including arithmetic and logical operations, and were divided for flexibility (e.g., AL for byte-level operations). ESP and EBP are special-purpose registers, designed for managing the stack. ESP and EBP are used for memory addressing: ESP: Directly points to stack memory locations. EBP: Used to calculate offsets for stack variables. If these registers were divided (e.g., into low/high halves), it would complicate address calculations and memory access, as only the full 32-bit value is meaningful for addressing. Since stack operations always require the full register, there was no need for partial access.

[@maxmuster7003]

@NeXuSInfoS3c We can use BP for 16 bit operation too, but if we use BP as adddress register without a segment override prefix the default segment is SS. .... I don’t like to push values to the stack, ignoring the calling convention. I use the stack for return addresses only for calling subroutines.

[@maxmuster7003]

@NeXuSInfoS3c I like to use the 16 bit mode of an 80386+ with 16 bit Offset register and i like to use the 16 bit BIG mode with 32 bit Offset register using an address size prefix(67h). In the 16 bit BIG mode we have A20 line on and a segment size of 4 gb for DS, ES, FS, GS segment and for CS and SS 64 kb limit. Don’t tell me that bp and sp are not usefull to build an address.

[@maxmuster7003]

@@NeXuSInfoS3c The only one difference between the 16 bit mode and the 32 bit mode of an 80386+ CPU is the usage of instructions with or without an operand size prefix(66h) and with or without an address size prefix(67h). These prefixes reverse the default size of one instructions. These prefixes can be used in 16 bit mode, in 32 bit mode and in v86 mode of an 80386+ CPU according to the Intel developer manual and documentation from AMD.

[@NeXuSInfoS3c]

@@maxmuster7003 BP and SP are still highly useful in both 16-bit and 32-bit modes for building addresses, particularly with the flexibility offered by the operand size prefix (66h) and the address size prefix (67h). Their default associations with the SS (Stack Segment) and their roles in stack management don’t preclude them from being used effectively for general-purpose addressing. In fact, in 16-bit BIG mode, with the A20 line enabled and extended segment sizes for DS, ES, FS, and GS, BP and SP can be powerful tools for memory access when combined with segment overrides or prefixes. Using 67h, you can leverage BP and SP to access 32-bit offsets, making them incredibly versatile beyond just their traditional stack management roles. Right now, I'm making these videos for viewers with no prior experience in assembly language, so my goal is to focus on foundational concepts and keeping things as simple as possible for beginners. I want to ensure they have a solid understanding of the basics like how registers function and their primary roles, before introducing more advanced topics like operand size prefixes, segment overrides and BIG mode specifics.