Basics of PWM Converters Controller Design. Part III. Peak Current Mode (PCM)

[@TizanaMenYo]

a very good approach to explain how the converter work, all other explanations in the internet are 90% based on formula and equations.

[@sambenyaakov]

Thanks for taking the time to comment.

[@ehsanbahrani8936]

Thank you professor. The channel contents are remarkabey by far the most useful either for theoretical issues, simulation or fabrication of a feasible system. Thank you again ❤

[@sambenyaakov]

Many thanks!

[@khalidaboushiwa6322]

Thanks Mr. Ben-Yaakov ! Not everyone can present a subject like you do, Thanks again

[@sambenyaakov]

Thanks Khalid for kind note.

[@sagarkshatriya4688]

I have done masters in India. I am professional engineer designing SMPS. I am grateful to you for this whole 3 part session. Love your way of teaching. Amazed by the knowledge you served. I watched this many times to understand n implement. I am working on LM5023 for wide range like 90 to 440 V AC to get output 5V.

[@sambenyaakov]

Thanks Sagar. Look up some more videos in my channel. There are many😊

[@sagarkshatriya4688]

@@sambenyaakov ok 👍🏻

[@anujregmi4582]

As per Hinduism, A professor(guru) is greater than the god, greater than the creater(bhrama), and lord Vishnu, as his teaching helps us attain enlightenment. Professor Ben-yaakov you are one of that guru. I bow down to you professor.

[@sambenyaakov]

Thanks

[@inico9366]

Thank you very much. It is in my opinion a very good introduction before going into more theorical analysis. Also, thank you very much for keeping providing these videos since many years.

[@sambenyaakov]

Thanks

[@happyhippr]

learning lots, great resource.. awesome so glad these video series exits. great work .. not many people probably look this stuff up but the ones that do.. it makes a difference! id be stuck without it. thx

[@sambenyaakov]

😊

[@ingDemurtas]

Excellent, you should have 100 times subscribers.

[@sambenyaakov]

Thanks. My subscribers are the chosen ones, Crème de la crème 😊

[@codydowling1120]

Another awesome refresher. I am so glad that I found your channel- you are an excellent teacher. Thanks!

[@sambenyaakov]

Thanks again

[@ryanroth9590]

Thank you very much for this video, and for all of your other power electronics videos. Your explanations are extremely clear and concise.

[@sambenyaakov]

Thank you very much for your comment.

[@nickyliu9871]

This video was extremely helpful for designer to understand PCM control. Thank you

[@ruixiong5237]

Thanks a lot for the clips. You are a great teacher.

[@sambenyaakov]

Thanks

[@aaronniehaus2224]

Was having some issues with oscillation and this video was extremely thorough and helpful. Thank you

[@sambenyaakov]

Thanks for comment

[@PSPS437]

Best explanation Dr. Sam. I am glad you shared it on IEEE power electronics society forum. Many will be benefited from this video series.

[@sambenyaakov]

Thanks for the encouragement.

[@NavinKumar-ef8ir]

A very helpful video to understand CMC. 🙏🙏

[@sambenyaakov]

Thanks

[@ehsanbahrani8936]

Excellent. Thank you professor

[@sambenyaakov]

Thanks

[@TSulemanW]

Great teacher. when i was young 14 years old i love electronic device,

[@sambenyaakov]

😊

[@khedayache1646]

Dear professor, thank you for your video. I have a question, do you have video about one cycle control ?

[@willytzui2407]

Very clear illustration! Could you add a video to explain how could peak/valley current mode control work under DCM (Discontinuous Conduction Mode)? Thanks!

[@sambenyaakov]

Perhaps in the future.

[@zz9758]

This is excellent presentation . Especially in PCM and ACM part! thank you !professor

[@sambenyaakov]

Thanks for comment.

[@shreelokhande]

Sir, you are awesome...all your videos are well paced and very informative. thank yo very much..

[@sambenyaakov]

Thanks for comment. I appreciate it.

[@chaiyonglim]

Hi Professor, can you make a video to explain the effect of double poles at Fs/2 in PCM? Where the Q of the double pole has dependency of slope compensation. I believe this was first introduced by Dr. Ridley, I went through the paper and many others paper after that but with no detail derivation to show how the Q factor equation derived.

[@sambenyaakov]

I leave it to Dr. Ridley who has blocked me, in one of the LinkedIn groups, from seeing his posts .

[@chaiyonglim]

@@sambenyaakov I am shocked to hear that Dr. Ridley has blocked you in the Linkedin group, can you comment what your though of this introduced double poles where Q factor related to slope compensation? The reason is there are so many different average models on PCM and I am not sure which to use. Industry widely used models are Chris Basso model and Sheehan model from TI, both included this double poles at Fs/2 but not exactly follow the theory behind it.

[@willytzui2407]

Great explanation on the current mode control and why it’s single pole roll off! Can you explain in an intuitive way why DCM voltage mode control is a single pole system also?

[@sambenyaakov]

Yes. Because the charge is transferred in quantized manner.

[@JohnSmith-ed1sr]

Professor, I am trying to find a video on regulating output current which in this video you say is not the subject of this video. Can you please tell me where to find information on making a buck converter a constant current source. Thanks

[@sambenyaakov]

Sorry, I don’t know offhand

[@inico9366]

Dear Professor Ben Yaakov, thank you very much for these intuitive explanations. I hope my question isn't too stupid. If the peak current of the inductor is compared to an error voltage, how can be moved the averaged inductor current depending on the load to reach a new steady state? In steady state condition,the converter should fight to reach always the same error voltage, i.e. always the same peak current... I hope my issue description is clear enough.

[@sambenyaakov]

THis reference to peak current is the output of the voltage error amplifier. The "reference"level" will be moved up or down as required.

[@psonna]

Thank you for this great channel! I wonder if you could refer me to a constant current PWM controller design, since I am having trouble finding bibliography on this subject and you mentioned it in your video.

[@sambenyaakov]

No, sorry

[@foodyshrii6795]

Hi Prof... great explanation, can you make a video on mathematical analysis of buck mode. which explains gain cross over frequency, bandwidth and transient behavior.

[@sambenyaakov]

See if this helps kzbin.info/www/bejne/gmSwg6F7jsmcbsk this is first of three parts

[@josip1881]

@Sam Ben-Yaakov Thank you, do you have maybe this material in PDF format?

[@sambenyaakov]

Sorry, no.

[@josip1881]

@@sambenyaakov Ok not a problem, gonna watch again and make notes

[@sandiagechu4825]

Sir, Can I use pure digital mode to implement PCM mode control, Can I use slope compensation by software?

[@sambenyaakov]

Yes but you nod very high shambling rate for current.

[@catalin3407]

Mr. Sam, since we get feedback of both the current and the output voltage (2 state variables), isn't this a "Modern Control Theory" approach to design a Current Mode converter ? I mean, in voltage mode control, the standard theory of control is used, but I can not find nothing relating this way of control to state space control approach... why ?

[@sambenyaakov]

There are many resources on that just google

[@PSPS437]

Dr. Sam: A quick question on the dynamics. When you say dynamics , does it mean how fast a system responds to the load changes? @26:23 you explain about avg current mode control. Vo/Verr is a 1st order system. 27:17 But, why do you say the dynamics are slower than peak current mode control ( what do mean by quick changes in current) . Both ACMC and PCMC are 1st order in the low freqs. Can you please be kind in explaining about the dynamics?

[@sambenyaakov]

Hi Swaraj, Good question (which means that I know the answer (-: ). The classical meaning of dynamics is the system's response to a step in the reference. This of course translates to the response to a load step. The loop bandwidth in ACM is smaller that that of PCM. The outer loop looks first order only as long as the current feed back loop is active. So in ACM the outer loop reverts to second order at a lower frequency, which means the the BW of the outer loop will be smaller. Are you looking at www.linkedin.com/groups/13606756 ? you may enjoy it. It develops into a good discussion group.

[@PSPS437]

Thanks Dr. Sam. 2 more questions if you please don't mind: 1) If system is a higher order the loop response is slower? I think this is the reason current mode control (1st order in low freqs) is faster than voltage mode (LC resonant pole ). 2) Isn't current loop always active in avg current mode control? since in ACM we compare the Vout to Vref and the error is the set point. Then current sense signal is compared to a set point and then compare the output of this to a ramp ( 3 comparators or 3 ampliifiers in ACM). Even in PCM, the inner current loop is always active.

[@sambenyaakov]

Hi Swaraj, 1. A second order system has a roll off of -40db/dec so to get a wide bandwidth there is a need for a compensator with very high gain at high frequency and a double zero. Which is almost a mission impossible. 2. The inner current loop in ACM has a small BW due to the need for filtering the ripple. Once the loop gain of the inner current loop reaches Odb, it is not functioning although connected, and the outer loop reverts to the basic voltage mode. If not imposing too much, I would be happy if you would post your very interesting questions at the LinkedIn group I have stated so others can benefit from the exchange. www.linkedin.com/groups/13606756 Regards

[@PSPS437]

Thank you Dr. Sam. I will join.

[@rudrasishsarkar3908]

hello Dr. Sam, This is an excellent presentation. Could you please add an explanation of the different hysteretic controllers ( like V^2). Thank you

[@sambenyaakov]

Thanks for comment. I will try. It may take some time as I had other clips in the pipeline.

[@kembocapelsii]

Thank you very much for all your video and time that you take for all this explanation. I just have a small confusing question. If you could please help me to understand. Around 6:00 you said that Io=ve/N, that mean error still equal to 0 . but at 12:00 you said that the reset is activate when the tension ( image of inductor) equal to ve that mean error is not still equal to 0. This is not really clear for me.

[@sambenyaakov]

First case talks about the benefit of current feedback and is illustrated by AVERAGE current mode. Second case is PCM.

[@EnriqueVetere]

Awsome video. I'm trying to design an average current mode converter. Do you have something specific for that? Thanks

[@sambenyaakov]

Thanks for comment. Nothing (yet) specific on average current mode.

[@khabylameyt5018]

this vref is it the voltage desired in the output of dc dc or what

[@sambenyaakov]

Yes, or a fraction of it if a voltage divider is used.

[@khabylameyt5018]

Ah, I have a problem. What causes the error? I know we use a voltage divider, but why? Is it just for compensation, to stabilize the voltage from the ripples? And then we compare this voltage (the feedback voltage) with Vref. Is this Vref constant for any value of Vout? If you could explain this to me, I would appreciate it. I feel lost. @@sambenyaakov

[@sambenyaakov]

@@khabylameyt5018The reference is fixed so if you need an output higher than the reference you use a voltage divider

[@Praveen1991917]

Sir, what should be the values of resistors in voltage divider?how should I calculate those values?what are the things I need to consider before I am going to step down the voltage?what will happen if I give directly to the error amplifier?

[@sambenyaakov]

You mean the voltage divider from output to error amplifier?

[@Praveen1991917]

Sam Ben-Yaakov yes sir

[@sambenyaakov]

The voltage divider matches the required output voltage to the reference voltage used. If the values are the same then there is no need for a voltage divider. Many at time the reference is already inside the controller IC so you cannot change it. If you can, beware not to exceed the common mode voltage allowable at the input of the error amplifier.

[@pvvikas]

Hello Professor, Thank you for the explanation. Although apparent from waveforms, I was wondering if there any intuitive way of explaining why a perturbation in inductor current amplifies over a period of time, when duty cycle is more than 50%.

[@sambenyaakov]

As far as I know, the geometrical explanation is as intuitive as you can get . Other formal explanation are much more involved e.g. www.ee.bgu.ac.il/~pel/pdf-files/conf45.pdf

[@pvvikas]

Thank you Professor. I could not go through the derivations but skimmed through the general concept presented. In the conclusions section, it is said that increasing the value of input inductance in a boost converter results in lowering of the maximum duty cycle beyond which subharmonic oscillations set in. Doesn't this seem counter intuitive since increasing inductance decreases inductor current ripple and hence oscillations should start to set in at a higher duty cycle.. Please apologize if I'm missing something very basic here.

[@sambenyaakov]

To Be honest, I don't remember the details now. If I have the time, I will look it over/

[@pvvikas]

No problem Professor, Thank you!

[@nimazsh]

Hi Prof. thank you for such a good presentation. How can we design a 3 phase converter for a particular application? do you have any presentation for that? or any references?

[@sambenyaakov]

Sorry for not being able to help.

[@shailendrarajput3734]

Hi Professor I am curious to understand why system order reduces for inner loop feedback of a state variable. Is there a intuitive way to understand this. Mathematical explanation would work for me too.

[@sambenyaakov]

Inner loop, within the range at which the loop gain is larger than one, makes the state varible dependent on the inner loop input signal and independent of the impedances of circuit so you can consider the state variable (say inductor current ) as a source rather that a variable that depends on circuit elements. Let me know if you" bond" to this explanation😊

[@anaselmoula8376]

thank you for the excellent work Sir, i have a question if you don't mind, in PCMC can the output load current vary or does the inner loop keep it in a certain value by regulating the inductor current. i just started working on this control and i am still confused. thank you in advance for any elaborations on this matter.

[@sambenyaakov]

The inner loop is controlled by outer loop. So when required the inner loop will change inductor current.

[@TSulemanW]

Nicely explaination

[@sambenyaakov]

😊

[@mohamedtebbo123]

Excellent work !!! Can you make videos involving embedded systems programming and design ? I really like your explaining !!

[@sambenyaakov]

Thanks for comment. Perhaps in the future.

[@sunil5330]

Excellent Sir. Thanks

[@sambenyaakov]

Thanks

[@kuime1]

You are the best!

[@dylandoucette6082]

Could this design be used as a short circuit current limiting circuit? If the error amplifier for the output voltage was eliminated completely and the clamp voltage was placed at that node to set the maximum allowable inductor current? Thanks

[@sambenyaakov]

Yes indeed. As a matter of fact, the circuit as is can serve as a cycle by cycle current protection if the output of the error amplifier is clamped to the desired value.

[@sudhanshutelrandhe5857]

Did you written any book on this or notes? If yes then from where to buy?

[@sambenyaakov]

Sorry no.

[@jagrutirathva3127]

how does average mode control work?

[@sambenyaakov]

IN general like described in video kzbin.info/www/bejne/nHeQm3l8hLyGj5Y

[@prateeksingh3808]

Awesome..woowww

[@sambenyaakov]

😊

[@swarajpattoth9050]

wonderful

[@sambenyaakov]

Thanks

[@faidularcs]

Thank you very much

[@anarghyamouli1356]

6:53

[@sambenyaakov]

?