Clock stretching in I2C (In Tamil)

[@tamilkanijayaraman602]

More than one master design, which one takes the clock control. When clock stretch recover condition, how it will behave. Thank you for sharing this video's. It's helpful to all of us.

[@ElectronicsForUs]

Watch video on arbitration

[@yogaraj2754]

Thank u now I know complete data about i2c .But one thing is provide same example code which will make it more valuable.

[@ElectronicsForUs]

+Yoga Raj i will cover during one of the programming video.

[@srinuvasanarjunan3071]

Nice bro, keep doing like this

[@Rajivirat]

Sir, channel capacitance ah vitutinga

[@a.rangarajanrajan3239]

Mr. SK what is the need of external pull up resistor in i2c bus. Why couldn't use the internal controller pull-ups?

[@ElectronicsForUs]

+A.Rangarajan Rajan For whole network two pull up resistors are enough. In CAN protocol, for low speed CAN still the similar concept has been used. (Individual nodes will have a termination resistor inside itself) In I2C, if we are using internal pull up resistors , it will be added up and bus capacitance will disturb whole communication.

[@a.rangarajanrajan3239]

@@ElectronicsForUs thanks

[@sujithadhanabalan2491]

Anna u said tat D1 is a device like sensor and wat are these masters and slaves..is they are just circuits or some other devices

[@ElectronicsForUs]

Masters and slaves are like controllers.

[@sujithadhanabalan2491]

@@ElectronicsForUs kk na...tnx for the reply

[@dineshalexandar2735]

Regarding bus capacitance logic , u forgot to mnetion, pls mention it and how to choose the pull up resistor value. pls mention it

[@suryas1616]

Thankyou very much sir

[@jrliju]

Super bro.

[@baranigowtham464]

Is clock stretching can happen in address phase? In between the master sends the address and slave receives the address.

[@ElectronicsForUs]

I2C protocol can be designed even with 8051 , So it is upon you whether to implement stretching in address phase or not. But normally slave will do the clock stretching, So in that case it will happen after the address phase only. Means, after the slave knows that the address belongs to itself but cannot react now due to another high priority task.

[@baranigowtham464]

@@ElectronicsForUs Got it.. thanks for your reply

[@panimalarkumar6734]

Hi ji, how to get address bit from slave without using datasheet

[@iswariyas5682]

Vaaipe I'lla bro

[@sathishkumarnagaraj1897]

Bro in clock stretching if one master communicates with multiple slaves means if Slave 2 device pulls the scl low means ...then remaining slaves won't communicate with slave ah?

[@ElectronicsForUs]

Nothing can communicate since clock is being controlled by master. Data will be sent according to clock. So other slaves also will maintain silence till clock resume.

[@sathishkumarnagaraj1897]

@@ElectronicsForUs super bro

[@raguanand3182]

Bro, is it possible to transfer data from one master to another master?

[@ElectronicsForUs]

At a time only one can behave as a master (After an arbitration). Automatically the receiving node will be a slave.

[@ramesharavindh124]

Bro bus capacitance enga ?..

[@ElectronicsForUs]

Will put a separate video as "stray/parasitic capacitance". In that i will explain about bus capacitance.

[@ramesharavindh124]

Electronics For Us bro not able to find tht video can u send the link pls?..

[@ElectronicsForUs]

Ramesh Aravindh Innum podala bro. Inimetha podanum.

[@ramesharavindh124]

Electronics For Us ok bro ✌

[@mani0536]

@@ElectronicsForUs really appreciated bro ... keep up the good work ... also try for programs in microcontroller

[@ganeshramesh9947]

Nice sir

[@electropaiyanelectroboy58]

I can't able to find that video.can u please send the link.

[@ElectronicsForUs]

+Electro Paiyan {Electro Boy} I told that i will put a separate video. Later.. in upcoming videos

[@dineshsourav9041]

bro, can u please explain about bit banging theory in i2c

[@ElectronicsForUs]

+Dinesh Sourav Hi Dinesh, Bit banging is creating an I2C communication without a SFR inside the controller. My videos are created based on the bit banging concept.It is a logic of I2C protocol.

[@dineshsourav9041]

@@ElectronicsForUs thank u bro

[@crazy_dog6814]

sir ....... you could not explain ...........what is bus capacitance...........please update that...otherwise explain that in command box

[@ganeshramesh9947]

Sir please upload the next video

[@electropaiyanelectroboy58]

sk where is bus capacitance video?

[@ElectronicsForUs]

+Electro Paiyan {Electro Boy} i will put a video separately.

[@manikandanrajendran2776]

Please share 1st two videos links

[@ElectronicsForUs]

+MANIKANDAN RAJENDRAN kzbin.info/www/bejne/hWrIkoOeat2GrrM kzbin.info/www/bejne/iYfbZYOfpK1mjs0

[@Sagarmore17]

Plz explain in hindi

[@electropaiyanelectroboy58]

Kk