Explaining RISC-V: An x86 & ARM Alternative

[@derek20la]

12:30 The biggest reason China, India, and Russia want to move away from x86 is because the built in Management Engine on Intel and AMD's Secure Technology can be used as backdoors by government intelligence agencies. Those subprocessors have been included on CPUs for over a decade now. On normal units, trying to disable the IME will render the processor unbootable. Except for special high security models made exclusively for the US Govt which have it hardware disabled from the factory.

[@tcscomment]

uh, I think Tuxedo disables IME/PSP

[@AmiVider]

Most serious users want to extend the instruction set (AI, IoT, Cloud, etc) not worried about "back door" security issues.

[@edwinkant]

India? You serious 😂

[@sarthakbiswas6925]

​@@edwinkant Yes Chin Chan Choo Chinese... Country with one of the most software engineers who has contributions in most open source projects.

[@volcanofindings6817]

@@tcscomment whats tuxedo? how can i use that to disable the IME

[@scottduede8134]

This is easily the best open-source/closed-source hardware explanation I have been given. Thank you, ExplainingComputers! I really needed this.

[@ExplainingComputers]

Thanks. :)

[@theshooter89]

totally agree

[@segaunited3855]

RAZOR.

[@zackrider3708]

@@ExplainingComputers sir, from what i understand the risc-v isa is free and open but the risc-v cores or microarchitecture is Not open or free,, How many companies open-source their risc-v cores or microarchitecture ?

[@AndersHass]

The ISA is open. The hardware can be closed

[@MichelMorinMontreal]

I don't think there are many YT channels where processor architecture, global economics, geo-political considerations and "Open-source" issues are discussed in a single and clear presentation! I think the correct expression is "Master Class"! And, indeed, Professor Barnatt, it seems clear (to me) that "This is going to happend"! Congratulations and thanks!

[@exquize1660]

Calme-toi Léon Blum, pas besoin d'en faire trop et de passer sous le bureau 🙂

[@vdivanov]

Great presentation on a pertinent topic, as always! Many thanks!

[@ExplainingComputers]

Thanks for your support. Very much appreciated. :)

[@carecavoador]

Somehow Chris seems to read my mind. As he almost every week publishes a video about a subject I've been thinking about. As always, a very interesting video, very informative and top quality production. Thank you so much!

[@rickedwards6150]

Have you been muttering about it around an Alexa-enabled device?

[@famailiaanima]

It is The Algorithm syncing you two.

[@ahmad-murery]

I think it's the other way around, Maybe Chris is forcing you to think about his next video 😁

[@arunavaghatak6281]

Law of attraction. Ask and you shall receive.

[@PeterJasper]

Open architecture and interoperability appear to be the hallmarks of advancement in technology as it fosters continued development and competition. I am sure that RISC-V will do well in an ‘uncertain’ world. Thanks for another great video.

[@Chris.Brisson]

One might look at the development of the Tizen operating system for lessons learned. People need to eat, so they need to have gainful employment, so companies must expend R&D dollars to pay engineers, but cost accounting suggests the quarterly statement would be improved by using an established product rather than risking new development. RISC-V ISA was open-sourced over 10 years ago, and yet relatively few developers are working with it.

[@terrydaktyllus1320]

@@Chris.Brisson It's the old "Betamax vs. VHS" argument again, although I am probably "showing my age" here - the best technology is not always the most popular one. I don't even know much about RISC-V because in 4 decades of working on computers of all shapes and sizes, I came across it once in an Acorn Archimedes computer that a friend of mine developed software on somewhere around 1990.

[@Peter1986C]

@@terrydaktyllus1320 The Acorn Archimedes did not use a RISC-V processor, but an "ancestor" to modern day ARM SoCs.

[@conorstewart2214]

Terry Daktyllus the Acorn was not RISC-V. RISC-V only came about in 2010. Im not familiar with the acorn but it may have used a RISC based processor but that in itself doesn’t tell you much about it. The best RISC-V chips are still quite a bit behind even average ARM chips, so they still have a very long way to go before they can even think about taking over. I also suppose a big disadvantage of everyone using RISC-V could be a security issue, if someone finds an unfixable exploit or issue in RISC-Vs design then loads of devices may have that exploit. RISC-V is good for interoperability except there are many different versions of the specification and it is determined by what features the chip is designed to have, like some have vector extensions, some have floating point support or atomic operations therefore for a program to be interoperable it needs to be compiled to use what resources are actually on the chip, and if a program needs vector support for example then it will either not be compilable for or run very slowly on a chip without vector support. This may not sound like much of an issue for simple programs, you just need to use a chip with the required functions, but once you get more complex like running Linux and running open source programs on that then it could become difficult to manage in my opinion, at least with a mainstream x86-64 cpu you know the same program will run on two different machines with different processors without an issue most of the time.

[@Chris.Brisson]

​@VoidField101x X-Windows did not replace Microsoft's GUI framework, but I would not say X Windows failed (as X11 is still widely used). But X-Windows does suffer from 30 years of being designed by committee, and so competing solutions are taking over. Don Hopkins has an interesting article on this titled "The X-Windows Disaster". Christopher Barnatt is explaining RISC-V here to an audience that has a primary interest general purpose computers, and he posits that RISC-V may join x64 and Arm in that market. Linux has less than 3% market share of personal computer OS after 30 years, and I wonder if RISC-V might see only that level of success.

I love the very insightful analysis at the end of the video. This is the first material about RISC-V I have seen on KZbin which takes into account not only technical aspects, but also economical and political ones. Like the Shakti initiative, which is largely ignored, but will probably soon have a huge impact on the whole chip market.

[@lawrenceallwright7041]

"Unlike some in the industry, I do believe that this is going to happen." And if Chris says it's going to happen, it's going to happen. Another eloquently explained video, thank you for all the research that you put in to bring us these insights, Mr B.

[@beshoynagib4812]

It happed bro. Nvidia-RISC-V summit 2024.

[@lawrenceallwright7041]

@@beshoynagib4812 Told ya! 😉 He doesn't do Explaining The Future for nothing.

[@rorytruman]

When I started out as an engineer the principle CPU I encountered was the Motorola 68K, CISC soon became dominant not necessarily because it was better but more due I believe to commercial partnerships. As a big fan of RISC over CISC during the late 80s and early 90s the debate as to which one was better fizzled out much to my disappointment so it is good to see a resurgence in interest. It just proves that good ideas never go away and the next few years promise to be quite exciting. Thanks for covering this subject Chris, I agree that geopolitical concerns will likely trigger an end to the dominance of the small number of players driving the current hardware/software market to the benefit of consumers who will have more choice in how they do their computing. Similarly crucial is open and common messaging protocols to support open computing

[@ExplainingComputers]

Thanks for this. :) I have fond memories of 68000 machines -- Amiga, Atari ST and QL.

[@johnmckown1267]

The only thing about RISC that might concern me is the amount of memory required to implement an algorithm vs. CISC. In many way, I consider a CICS instruction to almost be a fast subroutine call mechanism. IIRC, in many cases an X86_64 CISC instruction is actually implemented as a series of "micro-ops" in the CPU.

[@rorytruman]

@@johnmckown1267 yes I see your point. There is always a balancing act between different design principles. My personal feeling is that RISC should be more reliable and predictable in obtained results

[@ericwood3709]

It's a shame that PowerPC didn't find wider acceptance, isn't it? It was great in the Power Mac and POWER continues to work wonders in big iron applications, but desktop RISC took a major hit when Apple went to Intel and there was basically no other desktop RISC option. The next closest thing must have been MIPS and Sparc CPUs used in various workstations from SGI and Sun, respectively, but of course they ran unique UNIX operating systems and were never aimed at home users. It's kind of cool, though, how RISC went "underground" in the form of Arm by largely taking over in mobile computing, where it was less publicized and marketed for what it was, only to emerge once more as a desktop architecture thanks to Apple's adoption and the limited Windows-on-Arm implementations we have seen so far, which hopefully will expand and eventually replace x86_64. Windows on Arm can already run x86 Windows applications as seamlessly as macOS runs x86 macOS applications on Arm, and there is robust Linux support for Arm, so I would expect to see Arm begin to take over even in the PC space in the near future, beginning with portables. I'm waiting and hoping for AMD to come out with an Arm-based desktop SoC. A RISC-V desktop SoC from them or another major company would likewise be amazing, but I would not expect Windows to be ported to it any time soon, which will keep RISC-V limited in its potential applications for a long time to come.

[@genrabbit9995]

@@johnmckown1267 I don't think the memory part is a problem. Most Programs size today comes from the graphic , not the code.

[@RoboNuggie]

A great look at RISC-V, and something I think will be a force majeure in IT terms.... exciting! Thank you Christopher!

[@nichijoufan]

Robonuggie!!!!!!!

[@RoboNuggie]

@@nichijoufan Hello! (こんにちは!) :-)

[@aladdin8623]

That seems to be one of the better videos about RISC-V, which seems more unbiased than the ones from 'gary explains', who seems to be too close to arm. Anyway, congratulations for the good educational quality, please keep up the good work and thank you

[@markhatch1267]

Thank you for your effort in providing perspective and current industry trends in simple language. Wish you all the best in your endeavors and this channel. Keep up the good work, but also take care of yourself and don't over work and burn out either.

[@stolz999]

Great Video! As russian I may confirm that inside my country there are some attempts to build own CPU. But there is a problem: it's relative easy to design CPU, but it's very hard to establish a production and even harder to have enough of software. RISC-V Instruction Set is very variable. So here is the problem - CPU-designers should have specific compilers for specific CPU...

[@horseradishpower9947]

I have no doubt you Russians will succeed. You folks seem to thrive on challenge and difficulties. And I honestly want Russia to succeed in this. This war will end, and I want a future where our Russian friends can further the computer field. And I am sure you can.

[@lovekush2880]

Russians + Chinese will succeed in CPU designers

[@kayakMike1000]

As long as you follow the specification for RISC-V ISA, gcc and clang will be just fine. If you put in your own instructions, you'll probably need some assembly magic or an extension for clang or gcc.

[@lovekush2880]

@Utb00 007 Elbrus CPUs are not in Shops Elbrus 3 / Elbrus 5 / Elbrus 7 /Elbrus 9

[@BruceHoult]

It's very simple. If you want a processor for phones / tablets/ PCs then you implement RV64GC, now also known as RVA20 (RISC-V Application processor profile 2020, which in a way is a bit misleading as it's just a new name for a spec that hasn't changed since 2015). That's what is supported by Fedora, Ubuntu, Android etc. Later this year the RVA22 spec will be published including extra things such as Vector processing. In due course there will be an RVA25 or RVA28 or so, but RVA20 will probably be supported by major software distributions forever, just as the original 2003 Athlon64 is still supported in amd64 Linux.

[@radishpineapple74]

Your channel is one of the very few for which I have "rung that bell". A true gem among KZbin channels.

[@ExplainingComputers]

Thanks, most appreciated. :)

[@HoldandModify]

I’m so excited about this stuff. Really has a chance to transform the arena once again. Fun for us all! Thank you for another informative video.

[@alliejr]

It comes down to compiler and compiler-related technologies that drive virtualization as Apple has demonstrated with it's seamless move from x86 to (Apple) ARM.

[@RubenKelevra]

Well the video demonstrated that you can run a full linux desktop on Risc-V, so no issue with compilers :)

[@another3997]

No, to be successful, RiscV needs to have much more than just compiler technologies. The ISA itself has to be efficient, the chip fabrication has to be cost competitive, and the individual processor designs need to be competitive in both cost and performance. The tool chain needs to be robust and everything has to be well documented. On top of that, it needs industry support, otherwise it will simply wither and die. Deficiencies in any one area can make or break the whole thing.

[@RubenKelevra]

@@another3997 well, I don't see what's missing from your list - as there are already a lot of competitive chips out there. The issue is more about high power chips featuring a couple of dozen cores with efficient caching - that's basically everything missing. As an example Expressif with their very popular Esp8266 and ESP32 lineup recently announced to go full RISC-V in the future.

[@RubenKelevra]

@@another3997 but this seems to change this year too, with the announcement of the MIPS eVocore P8700 - which is probably powerful enough to compete on the small server market as well as workstations.

[@valenrn8657]

Apple's Rosetta 2 doesn't emulate AVX.

[@angryman9333]

i love how you explain things so clearly, thank you

[@NotARealPersonBR]

this is the best technology focused channel on youtube

[@bobdinitto]

Thanks for this succinct description of the various processor architectures. I agree with you that the open-source nature of RISC-V will be a prime motivator for further development. As we move forward we're seeing more and more utilization of open-source technologies as a way of ensuring access and promoting innovation.

[@ditzydoo4378]

A day you learn something new, is a good day indeed. I'd often times wondered about this very subject. Thank you for taking the time to explain it such a comprehensive manner.

[@encycl07pedia-]

I think it's always a good thing for hardware and software not to belong to monopolies or oligopolies. That NVidia Effect you mentioned is a prime reason why having so few control so much is dangerous and nerve-wracking. ISPs here in the United States have oligopolies and geographical monopolies in many regions and charge way more than pretty much everywhere else in the world for internet access.

[@encycl07pedia-]

@Zaydan Naufal That may be true, however most of the figures I've found have the USA near the top in terms of average broadband price, especially when we're comparing developed countries. The only SE Asian country I could find with more expensive average broadband internet prices was Laos. I didn't find any figures related to dial-up prices.

[@kaptenhiu5623]

As software engineers I can tell you that having monopolies or oligopolies in HARDWARE is blessing. It's hard to write a code, even harder to compile and test it against so many hardware

[@encycl07pedia-]

@@kaptenhiu5623 I don't understand why well-written compiled code would work differently on different systems unless the compiler is bad.

[@kaptenhiu5623]

@@encycl07pedia- not only different hardware needs different compiler. Different operating system or architecture needs separate compiler too. Compiler is a software that converts your code in text into machine code (such as app.exe)

[@encycl07pedia-]

@@kaptenhiu5623 Most people don't write compilers in addition to their code.

[@TradieTrev]

You've called it! I honestly believe our new future will be purposeful and more caring for our fellow humans with RISC-V.

[@ze2411]

AMAZINGGGGGGGGGG VIDEO !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! Best RV video I have seen yet!

[@locusf2]

Cost is also going to be a factor, since the licensing fees to produce ARM/x86 ISA chips is probably quite eye-watering. EDIT: Lot of really good replies have created more information on this. Top-of-the chain costs are minimal but it can be so that during chip development the costs can be expected to rise. Also one could consider the fact that chinese chip makers were embargoed from erratas from ARM due to international issues. I believe the embargo was not that long (some months) and has been lifted since.

[@ExplainingComputers]

Oh yes, chip manufacture is a cost-intensive business.

[@terrydaktyllus1320]

I don't see how cost factors into it. For very low cost, I can pick up an ARM-based SBC (of countless different types), a highly configurable micro-controller like a Pi Pico or ESP-32, or just a used Intel Core-i? PC (of which there are countless cheap models for sale used on eBay or elsewhere). What is RISC going to give me that those other three options don't?

[@Krieghandt]

@@terrydaktyllus1320 ability to extend the instruction set without making it public. example, military equipment with hidden anti-hacking hardware, removing sections of the cpu so it requires firm ware to run (ATMs do this already), the national labs are always designing a new supercomputer. Also, WD doesn't need all the ISA to run their hard drives or SSDs. So they can simplify the CPU quite a bit, and make a cheaper, yet more effective chip. Being able to customize the ISA allows you to modify the micro-code, which in turn allows you to modify the underlying silicone. Now, does this do much for an end user? Not really, except that x86 ISA was a hodge in 1986 and has only gotten marginally better.

[@terrydaktyllus1320]

@@Krieghandt I don't build weapons and I don't make my own chips. So "why should I care about RISC-V" still remains an unanswered question.

[@DFX2KX]

@@terrydaktyllus1320 that's as a consumer. Consider for a moment, that you're a government currently in some sort of international dispute. Intel and AMD chips last a long time, but failures happen. *where are you going to get more* if those companies are barred by law from selling them? Governments can also muscle into the offices of major manufacturers to ensure that the chips they're buying are reasonably secure, but that has nothing on, say, having your own security agency produce cryptographic extensions to the ISA that you can ensure from start to finish. As a consumer? The whole ISA is open, so if you're a software engineer or tinkerer, you can write low-level software should you want. And if the hardware implementation is open-sourced like the ISA is (not all chips, but some) than security researchers can audit it in ways that simply cannot be don with, say, my Server's i5, this gaming machine's Ryzen 1700x, or the Qualcomm ARM chip in my Samsung phone. Those are all closed, so there are critical errors people STILL haven't found yet.

[@johnglielmi6428]

All open source is a great thing and keeps technology and ideas moving forward. I'd like to see more information on encryption technology as well. You are a great teacher and I will always enjoy every video you create Chris. please do keep them coming and keeping everyone interested up to date on all areas of Computer technology. Thank you for all you have done and will do in future for us all. As a side note: My concern is how easy would it be to hack a system using RISC-V technology? Identity theft is already a huge concern for people. and if we are just making it easier for cyber criminals to get at information. I don't see a benefit. No encryption system is uncrackable. We are always hearing how Government facilities, Social Media sites and Banking industries (i.e. Credit Card Companies) are being hacked and all information being stolen. This is a huge problem and could effect entire economies if we are not vigilant in trying to keep private information just that private.

[@sharonwolff1]

Most (maybe all?) encryption algorithm are 'open source', in the sense that they intentionally don't hide how they work so the larger community can look for flaws. The 'secret' of encryption is that they have algorithms that are easy to go one way and hard to do the inverse without knowing the encryption key. They don't work by having a secret way of scrambling the data that some reverse engineering can easily break.

[@evannibbe9375]

Hackers don’t work from inside assembly instructions. The modern hackers you encounter will be going after php and JavaScript, and Adobe Flash-powered websites. The biggest targets for the hacks that steal your information are websites storing passwords using plaintext, or otherwise from users who don’t make long enough or complicated enough passwords. The billions of dollars stolen in scams each year don’t even come from actual hacking, but rather social engineering of convincing people on the phone, email or via advertising to give out personal information from their own free will based either on promises of future payment or fear-mongering by appealing to authorities. As far as open source hardware and software goes, the open-ness means that you can personally check for security flaws, and you can then tell the designers to fix those flaws. The open-ness also forces better design because companies don’t want to be caught using a bad underlying design. What you are thinking of is security through obscurity, which is a complete joke in Computer Science, and has considerably harmed the field by reducing the extent to which students can actually learn about what might be wrong with the software and hardware they might be using.

[@JLCPCB]

Very good explanation on the topic and also really interesting to watch!

[@Mikael97]

Great explanation, I really enjoy your educational videos, thanks for explaining things clearly, many people sometimes complicate and you made it easy for us, anyway, keep up your good work 👌🏽

[@STORMFIRE07]

Tomorrow is mid semester exams and people have driven me crazy sending messages regarding question queries and stuff, you video was a good relief from all the stress buildup of today, thanks a lot Mr.Chris

[@ExplainingComputers]

Good luck in your exams! :)

[@johnmckown1267]

One ISA which was not mentioned is from IBM in its proprietary "enterprise" mainframe, the "series z" which is the great^n grandchild of the S/360 mainframe from the 1960s. Granted, this is not something the average person will come across. But it is a very interesting, to me, because I've worked on them for 40+ years. It is a very CISC architecture. One reason for its popularity in very large enterprise systems is its extreme reliability. I have had a CPU fail & the hardware did a fall over to a backup CPU in the machine with NO outage to the code running on the failed CPU. That code was restarted by the hardware automatically and the OS was simply "informed" of the fact for reporting purposes. In addition, the machine automatically "called" IBM service, who came out and "hot swapped" a new CPU replacement. Again, with no outage to anything running on the machine.

[@ExplainingComputers]

Very interesting, thanks for sharing here. :)

[@captain150]

That is quite interesting. I can't imagine the other CPU is just a spare waiting for the primary to fail, is it? Both CPUs would normally be in use, yeah? If one fails then its workload is transferred to the other? What kind of use-cases would demand such extreme up-time/reliability? Banking comes to mind.

[@johnmckown1267]

@@captain150 every IBM z mainframe comes with multiple physical CPUs. The exact number depends on the model. But your license, enforced in the "firmware" only allows "n" of them to actually be running. The others are in a kind of "hibernate" state, doing nothing. If an active CPU fails, one of the "hiberating" CPUs is activated and automatically recovers the work it was doing.

[@johnmckown1267]

@@captain150 yes, banking like ATMs is a case. Anythhing where an outage could cause harm or servere customer upset.

[@bitwise2832]

If I recall, from an IBM course in the 1990s, the MTBF for the 390 was 30 years.

[@MdFahimMuntasir]

Amazing chris! Every week you gave such enjoyable video I must have to see it. As long as you explans over different tech subjects. Love after you upload a video. 😊👍💙

[@ExplainingComputers]

Thanks for watching. :)

[@qc15pvetter]

Another amazing video Chris!

[@ExplainingComputers]

Thanks for your support, most appreciated. :)

[@asknight]

So glad I found this channel. Thanks for the easy to digest information!

[@ExplainingComputers]

Thanks for watching. :)

[@thaernejem7317]

Always nice to see a new video notification!

[@Activan1]

Hardware Linux.

[@carlabouantoun6152]

Basically yeah

[@NonaChua]

Idiot

[@charlesburnaford7591]

The first RISC computer that I worked on was the DEC PDP 8. which had only 13 instructions. The assembly language source code for the BASIC interpreter was about 6000 lines of code in PAL. It ran in 4 to 8K of ferrite core memory.

[@blademan7671]

The last 4 min is the most conversational you’ve ever sounded. Please have more conversational commentary!

[@ExplainingComputers]

Thanks for this feedback -- noted with thanks. :)

[@MicrobyteAlan]

Very informative, interesting and well presented. Good stuff to know, thanks. 👍👍

[@Mkhwlani]

I really have to subscribe to you, i always search topics on computer and always see that you have a fantastic video covering the topic. Thanks so much and continue making good content 👍.

[@3v068]

I first learned about RISC-V when I was looking up the PS2 and how I could make homebrew games for it. The PS2 was made with a RISC processor and it was made BRILLIANTLY by Sony.

[@fernandoalarcon525]

Where you not listening when he explained that risc 5 was made in 2010

[@3v068]

@@fernandoalarcon525 did you not see that i never said that Sony made the ps2 with a RISC-V processor?

[@3v068]

@@fernandoalarcon525 RISC was in development long before RISC-V. It was practically an improvement to one of the most efficient and the greatest selling console in history. I was talking about how awesome RISC is. Not how Sony made the ps2 with RISC-V which would have been impossible.

[@billkaroly]

Wow. Great presentation. This made me think back to the MOS 6502 for some unrelated reason.

[@Doobie3010]

I remember the dying days of my Amiga 500+,I seriously considered the Risk-chipped Archemiedes machines.But the IBM AT format stole my heart.Thats why i still find this very interesting.Edit-Risc,even.

[@ronkemperful]

Fascinating! I am looking forward to building a RISC-V desktop computer, with you, of course giving the helpful step-by-step instructions in a future video.

[@deanstyles2567]

Another great video Chris! What I think will prove interesting is how the extra processors in an SoC or CPU would be integated in this 'brand new world' of RISC-V. It seems that modem chips are loaded with all sorts of processors for things like hardware encoding/decoding of proprietary media codecs, image signal processors, dedicated AI hardware, etc. Especially with proprietary codecs in a more 'constrained' trade environment.

[@Colin_Ames]

As always, a very interesting and informative video. Thanks Chris.

[@russellzauner]

Sorry I'm late and thanks for this great video. For those interested in knowing what further power they have in their hands, even as an enthusiast/hobbyist, there is a collection of open IP/cores. I don't put any links on comments; even spelling a link (eg; some site _ot or_) seems to get trapped by whatever YT has for autodelete mechanism, so you'll have to search "open IP cores" using whatever your favorite search tool is but I'm not kidding when I'm telling you now that it's a *very* deep rabbithole that is also a bunch more rabbitholes inside that one; make sure to schedule yourself some time or you will be late to whatever else you were planning on doing.

[@ScottSmyth-p5n]

straightforward and to the point, thanks!

[@peppe540]

Excellent video Chris (again)! Clarity, sketching the here and now and the future. Very keen on the follow-ups; I agree RISC-V will enable many parties to develop their own solutions, which in general benefits us all as end-users. So yes, a 3rd way to get where we want to be, great!

[@renobodyrenobody]

Excellent, thanks a lot, I was waiting for this one since months! Thank you Christopher.

[@ExplainingComputers]

Thanks for this -- I got there in the end! :)

[@automateTec]

It is also worth mentioning that RISC is a philosophy that argues that a Reduced Instruction Set can have a performance advantage over CISC.

[@kayakMike1000]

RISC has a lot of advantages over CISC. CISC requires much more complicated decoder stages required to activate the right circuitry in the execute stage. Instruction execute for seldom used instructions can take up core surface area, making the core bigger. I recall reading that x86 is actually a few CISC cores that operate on similar registers; but instruction decode is hella complex and uses lots of power. With a new design, you can eject all that crufty circuitry.

[@kayakMike1000]

If I come across that reference, I will try to post it, sorry for not citing the article....

[@BGBTech]

Both RISC (and a sanely designed VLIW) allow for one to implement processors that are both cost-effective and high-performance (where VLIW can leave some work up to the compiler that would otherwise need to be handled by the CPU, at the cost of adding hair to the ISA design and causing processors with different pipeline width to not be binary compatible even if running the same basic ISA). In this case, a superscalar RISC core requires a more complex CPU, but RISC allows the same code to run on a 1-wide and 3-wide machine without recompilation. For a traditional CISC, the core would end up being more complicated and expensive (than either), either requiring partial translation ("micro-ops" in x86 terms), or a longer and more complex pipeline design (such as to deal directly with Reg/Mem operations; unlike the Load/Store approach in most RISCs). But, this it is still not necessarily a binary choice, for example, x86 (with a single memory access per instruction) would still be a lot easier to implement efficiently in hardware than the VAX ISA (with potentially 3 memory or more memory access happening in a single instruction). What if there were a world where VAX had won?... Say, where things like "bar->y=foo->x+(*p++);" could be expressed in a single machine instruction (x86 doesn't even come close to VAX in this area...).

[@MultiMidden]

The story I heard (may or may not be apocryphal) about the development of the ARM instruction set was they at the most commonly used instructions used on the BBC micro's 6502 and basically used implemented those.

[@kimjuhwan2101]

Thanks for the video. Your video gave an insight that companies who make CPU, OS, and rig altogether such as IBM, Apple, Oracle manufacture RISC processors.

[@PS_Tube]

Today's tea time has become RISC-y time. Cool ! PS : Have an amazing week Chris.

[@joeg3950]

Thank you for another rich-in-content video. Have a fantastic day!

[@willi4242]

Hey Christopher, thank you again for your well researched and inspiring videos! I do also believe, that Risc-V will be "a thing" in the upcoming years. The European Commission has put parts of their hopes into Risc-V (I am thinking about research in Horizon Europe and the EU Chips Act). And since a lot of European countries are more deeply looking into their dependencies ("strategic Autonomy") - Risc-V seems an interesting alternative. Leaves production in Europe as another crucial factor. Keep up your brilliant work of "explaining computers" rather just using them ;-) Greetings from good ol Germany!

[@ExplainingComputers]

Thanks for this -- and greetings from the UK! :)

[@qwkimball]

Irrespective of the perils of any given week, I can always rely on learning something interesting and useful and enjoying the journey each Sunday morning. Thanks for that.

[@jajwarehouse1]

I see two potential big problems that could hinder the wide acceptance and use of RISC-V. First, much like Linux, every manufacturer will want to build its own flavor, and although software that adheres to using the core instructions should theorectically work on any manufacturer's chip, we all know there will be compatibility issues even before introducing custom logic. This would further complicate software running applications on Linux as now you would need to be sure it is both compatible with the flavor of Linux on top of the flavor of the CPU. The second and much more dangerous issue will be the manufacturers, especially government owned, being able to embed instructions for, let's say, reasons outside of performance improvements.

[@dequeue3301]

A very interesting point raised! In that case, there needs to be some kind of standardization of RISC-V so that besides the prospect of building flavors, some core architectures, including compatibility issues, remain same for similar/all range of devices. As for embedding unwanted instructions in the microprocessor, I believe surveillance in a capitalist system where the State is ever so paranoid of dissent, it could certainly move towards such measures (they already sponsor spywares). In such cases I believe the need is to overthrow such regimes and establish its antithesis in dictatorship of the proletariat and take the first steps towards world socialism.

[@MattOGormanSmith]

I don't see a big problem. Linux distros will be precompiled for base levels, in the same way that i386 builds were used for 486 & Pentium. Standard extensions will be supported first by compilers, and then as standard distro builds if demand is there. Non-standard extensions may only be supported by the manufacturer, but in the worst case you'd recompile stuff yourself. As long as the compiler is open source, there is limited scope for nefarious instructions. Less than in a proprietary OS for an intel chip, for sure.

[@Martinit0]

I don't think "every manufacturer will want to build its own flavor" is generally true. In fact, if you are not a big (Intel size) manufacturer you may want to stay compatible with existing designs to encourage adoption. Yes, if you are Intel you may want to throw in your own salt to make life difficult for competitors. But I don't think this is generally true for every manufacturer.

[@AbrarShaikh2741]

😅

[@evilhamsterman]

​@@Martinit0depends on the use. RISC-V is picking up steam for embedded systems, that are very specialized and not used for general purpose. Like Western Digital using it for drive controllers. It's a royalty free ISA that they can do whatever they want with for their specific need

[@davidtipton514]

Thanks for the reviews and explanations! I really appreciate your videos.

[@rogerkoh1979]

As it is open-source, I hope for more chips with better design, price, Performace, and battery life. Look how Linux progressed over the years.

[@CyReVolt]

Well, "open source" and Linux are quite different, as that refers to implementation, while RISC-V is a set of specifications. Whether high performance chips will be open is up to their creators implementing them.

[@terrydaktyllus1320]

@@CyReVolt I'd also argue that (to my understanding at least) CPU chips may not have been "open design" like RISC-V but their specifications have been open enough to allow developers to get their software to work with them. Certainly from a Linux perspective, custom wifi and graphics chips tend to be far more closed in design.

[@CyReVolt]

@@terrydaktyllus1320 Indeed, and the problems arise in the same fashion for BSDs, Illumos, Plan 9, Redox, and all the other operating systems to which documentation is missing due to closed peripherals. The same problem reccours in firmware, which runs with higher privileges, so that a verifiable, auditable implementations is not feasible, like currently on AMD and Intel platforms. Combined with "okay enough" grade quality of vendor implementations, we see lots of problems here and there that make people throw away stuff or degrade the usefulness of their devices.

[@another3997]

@@terrydaktyllus1320 A Risc-V processor can be completely closed, with no freely available documentation or tool chain. It is entirely up to the designers of a particular CPU based on the Risc-V ISA. They can add whatever proprietary extensions to the chip they want to, and charge what they like for the CPU design. They have no obligation to make that CPU design available to anyone else, just like Apple keep their proprietary ARM designs to themselves. The only "open" aspect of Risc-V is the actual instruction set.

[@121Pal]

…excellent video, Chris, not only for your technical insights but also for your wise geopolitical predictions…

[@SergiuszRoszczyk]

The last section reminded me of russian Elbrus 8S CPU and deep interactions with open source community. While CPU somewhat works there is a need for library support. And when it was done once it can be taken by anyone and no restrictions will prevent that. Speaking of Risc-V ISA I wonder how it will develop in future. ARM is not only ISA IP but also cores. In Risc-V it is up to companies and countries do develop cores and manufacturing processes for them. That part might get quite interesting.

[@Anticorriente]

Russian gov will be star to develop hight foundries in the new years, so maybe Risc-V cores made by russians will be appear in the market in a few years.

[@user-nu9xh4bc8d]

I pretty sure that elbrus 8c (e2k/vliw) cpu works at same performance level of E5-2609 v3 (cpu from 2014) for java service after tweaks and also with extra steps of software optimizations for closed e2k architecture and their C/C++ compiler. While E5-2609 v3 on amazon cost around 100 usd, that elbrus 8c cost around 1000-1500 usd (as part of russian pcbox for home/office users by ao-avtomatika). Also Russian manufactures showed early looks of their baikal notebooks that pretty much looks like SoC board for TVs inside notebook case XD and Mali graphics.

[@homijbhabha8860]

@@Anticorriente there's also a RISC 5 CPU called Shakti processor made by India as an indigenous CPU, although the design was done here the fabrication for it was done by Intel in the US, so don't know how independent we can get with such stuff without fabrication centers in India itself

[@squidkid2]

A very interesting and clear analysis of RISC-V and its potential evolution in the future.

[@AMDRADEONRUBY]

Nice it's Sunday already have a nice week going to watch while I eat my breakfast

[@ExplainingComputers]

Have a great day!

[@AMDRADEONRUBY]

@@ExplainingComputers you too

[@robpizza6192]

Interesting video!

[@fremenondesand3896]

you know, as scary as change is, it's about time it happened, it just needed the right sort of push. I for one am hopeful this innovation will lead to a bright new future for computing. I hope it's not just being optimistic.

[@geog8964]

Thank you for the comprehensive introduction.

[@IAmPattycakes]

I'm just hoping there are massively parallel RISC-V server chips at some point soon. Web hosting doesn't need crazy fast single core, and is basically implicitly parallel. Getting even half the performance for that workload with a quarter the silicon being used is very reasonable when you see the amount of bloat that's crammed into x86 now that doesn't ever get used in many programs. Most of the software I write would definitely benefit from that, but I'm only a one server kinda guy right now so I don't really drive the market.

[@Krieghandt]

Don't forget, IBM still makes custom Power CPUs. Wouldn't surprise me at all if they move that division to RISC-V, as the M68000 ISA is pretty long in the tooth now.

[@lamjeri]

You're not alone on that. And I think that your wish will come true, also due to the fact that RISC is far less power hungry and produces less heat, which could become a huge money saver for cloud computing in recent future, at least in Europe.

[@justjustgord]

Fantastic series ! .. RISCV brings back some of the original excitement of the early computers from the 80s. Would be great to explore some of these Neural processor cores in future. Thankyou !

[@sepgorut2492]

Interesting SBC times ahead!

[@ExplainingComputers]

Yes, very much. I expect we will have at least one RISC-V board cost and performance competitive with a Raspberry Pi a year from now.

[@ConfuSomu]

Thanks for the overview! I learned a lot via this video. Amazing video as always!

[@ronkemperful]

Thanks! Great subject and certainly a much needed look towards an exciting technology that will improve the future of computing.

[@ExplainingComputers]

Thanks for your support, most appreciated. :)

[@chriholt]

Thank you Chris for your usual clear explanation of this architecture!

[@ExplainingComputers]

Greetings Chris. :)

[@NeverlandSystemZor]

I LOVE the idea of a more "open" world and CPU base for moving forward.

[@airaction6423]

There is nothing open. This is just a marketing strategy. The IP design is still closed source.

[@TheHatMan69]

Fascinating!

[@kayakMike1000]

RISC-V is da bomb. I followed a tutorial and designed my own core. I call it the FROOBIAN core. So... Couple of cool details. SiFive is a company spawned by the researchers who designed the original ISA. The architecture is modular and is broken into several pieces to support different use cases. For example, if you need a simple microcontroller and not much floating point math you probably just need a simple integer core. Need more math? Just add in support for the hardware multiply and divide ISA module. This is just an example, there are around 16 extension modules that can be added to your core. Modular for the win!

[@ExplainingComputers]

Thanks for this. The "cool detail" of SiFive being founded by the creators of RISC-V is covered in the video. :)

[@kayakMike1000]

@@ExplainingComputers yeah, I started writing that right before you mentioned it.

[@kayakMike1000]

@@ExplainingComputers great video btw, thanks!

[@perrymcclusky4695]

I find RISC-V a fascinating technology. Looking forward to your next video!

[@ArnaudZANETTI]

Let's note forget about MIPS architecture, found in many Routers / Access Points / NAS. It is currently the third most common architecture (for example implemented in many chinese SoC to avoid ARM licence) even-though it will gradually disappear (en.wikipedia.org/wiki/MIPS_architecture).

[@mikiethebikie]

Damn good summary Chris.

[@christophbugel7160]

Thanks for making such great videos! friendly, concise, answering most questions that arise in my mind while listening

[@PinakiGupta82Appu]

Your video will give a detailed insight into the implications of choosing a particular ISA for developing products meant to be future safe. Closed ISAs can be a hindrance for critical applications depending on the geopolitical situations and trade restrictions on tech transfer. Governments and corporations will find the RISC-V open-source ISA to be a safe investment and less dependable on tech agreements for critical hardware applications. Happy Sunday Evening!

[@sharonwolff1]

I think RISC-5 will become as big as Linux is now. Something that has potential to become bigger than it currently is but because it isn't the existing mainstream thing, always on the sidelines.

[@tarmaque]

Linux is hardly on the sidelines. It is widely used on many _many_ things. Things from ATMs to server farms to cloud storage. In fact, Linux is on the vast majority of computing devices in the world, and you probably interact with it every day without knowing it. It just is on a minority of _desktop_ computing devices. The latter is a subject we could discuss for hours, and why it isn't more widespread than it could be.

[@FlameRat_YehLon]

@@tarmaque many "high power" embedded devices runs Windows, though... Industrial automation also seems to be pretty dominated by Windows. There's no doubt Linux can do those jobs as well, but Windows kinda took it first and there's no real reason to switch away from it really. Linux got more success on the ARM side for the same reason, though. By the way, if Linux become more successful on desktop most people should be expected to pay for it or get lost in configuration hell to solve simple problems. Probably a bit cheaper than Windows but not by much, and the price advantage might not even stay.

[@lightly-red-huedmaleindivi6266]

@@tarmaque @tarmaque We don't need to sit here for hours to explain why Linux isn't adopted by most people. Just install Linux to learn why. Making a USB drive and find a third party tool to install a ".iso/.img" file. Entering bios/boot and choose usb. Opening terminal and entering commands. Yeah, good luck getting people who probably don't know how to hold phone cameras horizontally do those things. The websites of alleged most popular distros, Ubuntu, Manjaro, and Linux Mint, aren't even available in languages outside of English so the market is already restricted right at the gate (meanwhile Windows asks language immediately on start). Good luck trying to attract people who aren't well-off, tech-oriented, white boys in western countries to your little club. (as an aside, Fedora is the only site that offers language change option on their website BUT IT'S AT THE ABSOLUTE BOTTOM OF THE SITE) 🤦‍♀️ Windows initial start is completely graphical UI, Windows comes preloaded on machines, Windows has huge amounts of documentation, and everything works right out of the box with installation wizards (and Linux software stores tend to have outdated software looking at you Linux Mint and WINE). Most importantly with Windows you don't deal with Reddit mental cases who lack the social ability to fathom the perspective of a normal person. Linux users are and will continue to be the laughingstock of the tech world until they can understand this and cope. No one cares if industrial applications use Linux because the common person are whom most productive, creative, social, gaming, etc software is made for.

[@tarmaque]

@@FlameRat_YehLon Indeed, I know this. I worked in CNC manufacturing, and most of the machines use some version of Windows. That's because they are essentially desktop machines hooked up to industrial hardware, which is because they require a graphical interface. The most recent machine I ran and programmed ran Windows XP, but the hardware it sent instructions to was actually Linux based. If you opened up the controller it was all industrial, but if you opened up the console it was just a Windows PC. (There was no reason it couldn't run Windows 7, that being the standard when it was manufactured.) Some of the older machines I've run used proprietary operating systems that aren't really either one. They were digital CNC, but in the same way a cheap calculator was. The old Amada machine I ran was so simple it only allowed a grand total of 99 operation steps, which had to include blank steps to bracket programs. (It sucked.)

[@tarmaque]

@@lightly-red-huedmaleindivi6266 Uh... I've been using linux for 20 + years. I'm currently running two MX Linux machines, and typing this on one.

[@neilthomas6042]

An interesting and informative video. It will be interesting to see it develop in the next few years. A RISC platform will allow for much development.

[@Tall_Order]

The more (competition) the merrier. More options.

[@sylviam6535]

Great video, as usual. Well explained, handled the politics neutrally. For parts of the world, RISC-V + Linux will mean a healthy level of digital autonomy.

[@paco3447]

Nice. A small clarification, all x86-64 are internally RISC way back since P6 architecture (first Pentium Pro). So it has actually a RISC based micro-ops core (exposed CISC instructions divided into uops then executed through its RISC bare core).

[@ExplainingComputers]

I did say in the video that the boundaries are blurry these days . . .

[@paco3447]

@@ExplainingComputers Yep. No bad pretensions intended. Just to point out anecdotal info.

[@ahmad-murery]

Necessity is the mother of invention, I hope at the end we will have something to competes in the prices/performance, Thanks Chris,

[@John.0z]

I think there is another reason why RISC-V will succeed, and maybe do better then ARM - the licensing cost. The reduction in cost, even the small costs associated with licensing closed architecture, is being looked at as something that can be avoided. This is particularly the case when a manufacturer is producing a lot low-cost devices that use a processor of some kind. So far the two main processors in this space seem to be ARM and MIPS, but there are others.

[@RixtronixLAB]

Nice video, thanks :)

[@Reziac]

Very informative, and a good start. Could we extend this topic to compare the capabilities (and particular benefits or deficiencies) of each family of CPUs?

[@donporter8432]

Thanks Sir Chris. A different type of video which I'll need to watch a few more times to get it all. My gray matter needs to concentrate harder.

[@ExplainingComputers]

Greetings Don. :)

[@lightly-red-huedmaleindivi6266]

Yeah I sometimes watch them again and meditate on them a bit. It's a lot of information at once.

[@trollerjakthetrollinggod-e7761]

What should freak you all out is that the Intel ME and AMD PSP are closed-source chipsets built into their processors that are widely considered to be backdoors or spyware because they have top-level access and run as long as there's power to the motherboard. Meaning that if anyone had control over them, they would have higher-than-admin level access to your computer, regardless of what operating system you are running.

[@castillo4141]

As usual, great video and thorough explanation of a complex topic, even for a layman like myself.

[@momq1434]

Im looking forward to the RISC-V RPi alternatives released with affordable prices

[@Littlefighter1911]

At my university, we have a RISC-V processor project. Let me tell you, it's amazing, when you can "just" use rust without too many hurdles on your own CPU. If RISC-V support beings to increase, maybe we'll be able to run C# one day on it, or wasm etc.

[@Avantime]

The big question is how quickly China will take up RISC-V and in effect, flood the world with cheap RISC-V devices through companies like Xiaomi and Lenovo. Chromebooks are also starting to become mainstream and there's significant price pressure on these cheap devices, so RISC-V may end up penetrating this segment. Forks of Android on RISC-V will IMO arrive rather quickly, and the price-sensitive markets (inflation pushes consumers towards penny pinching) will take up on it. Also it feels like with the M1 Mac the sun is starting to set for x86 for consumer computing, especially laptops, and I don't see Intel wanting to give ARM a chunk of its cash and control over designs, rather than control its own destiny with RISC-V.

[@joefish6091]

Chrome books might be cheap in many places, not the US. America is a gouging scammers paradise.

[@rolfw2336]

excellent description of RISC-V and its implications, in less than 15 min :-)

[@lorderectus1849]

He’s into risqué Voyeurism! With his Arm!

[@hermanwooster8944]

Thanks for covering this! I would like to see a new instruction set architecture develop. At least it will make things interesting.

[@williamhart4896]

Was wondering when you were going to give us a walk around risk 5 vrs x86v64 and ARM ,as semi open source and the closed source of the competition cores Isa . thanks professor Chris

[@chrisweddle2577]

Another great video, thank you! Not so sure though, about the subtle change to the outro. Some of your fans who like to speak along with that bit might get upset if there's too much of that sort of thing.

[@ExplainingComputers]

Sorry about that, I was not aware I made a change, but it was a long take! :)

[@soal159]

Hard Drive makers were quick to adopt RISC-V to help be competitive with prices and custom solutions without paying the ARM mafia. I wonder if Apple will include RISC-V in future Apple Silicon designs. It would make a lot of sense given that Apple is already expensive which this would just give them more margin in the long run once the development cost are paid off.

[@catchnkill]

May be. But it will take many years. Apple started the ARM replacement to x86 instruction set on its notebook and Mac mini at the end of 2020. The conversion has not been completed yet. After that, Apple will converge the software development so that software will be written once and run in all Apple platforms i.e. ipadOS, macOS and IOS.

[@ChandrasekarThodla]

Wars and geopolitical tensions have always accelerated technological advancements as a side effect - thanks for the great video!