How Good are Shielded Cables? - A Practical Demonstration

In this series, we demonstrated the shielding effectiveness of commonly seen shielded cables. This is Episode 1, where we compare the two types of shielded cables.
Audience Level: electronics engineers, system integration engineers

[@brunohaid5770]

Lol, bonus points for Maxwell and Faraday in the back!

[@MachOneDesignEMC]

And Tesla, not the EV!

[@jimsvideos7201]

Niche, but I’m here for it.

[@emreozkan4195]

Thank you for this informative video. I did test my cables and the result was the same. But I have a question. Are there any documents about this comparison and the reason behind it? I couldn't understand the math behind it.

[@zaikindenis1775]

Thank you for the video. But could you explain why you are measuring CM current to measure shielding effectiveness?

[@MachOneDesignEMC]

There are many ways of measuring the effectiveness of a shielded cable. Using a current probe is just one of these methods. As I mentioned, when it comes to shielding effectiveness of a screen, the theory often doesn't match with the reality. So a current probe method measures the current on the outer surface of the shield, which should be zero if the shield is really good and terminated properly. if not, you are gonna see significant CM current on the outer shield. I would recommend watching this kzbin.info/www/bejne/mHzEc4qhhN6Am5osi=ZmWBJIa7sG2z7WPT

[@zaikindenis1775]

@@MachOneDesignEMC Thank you for your reply. But that is actually a question. In that video, you provoke high CM current by attaching an extra piece of wire to the central conductor. In this case, you measure CM current that is just because of extra displacement current from the central conductor to external room ground. But here you measure the effectiveness of the shield using a similar approach but not connecting anything to the central conductor.

[@zaikindenis1775]

I assume here that with a bad cable, the skin depth is relatively high so return path current density is also presented on the outer layer of the cable, and due to finite conductivity and inductance, the is some voltage drop on the outer side of the cable, that causes the CM current... Thank you.

[@MMichaa]

How is the clock demonstrator built? I'd love to see what chip you used to generate the fast rising edges.

[@MachOneDesignEMC]

It is just some switching MOSFET, you can design the gate drive turn on resistor (make it close to 0 R), so the rise time is sub nanosecond

[@ijontichy6070]

👍👌

[@MachOneDesignEMC]

Glad it is not a 🤌. Lol

[@tomasbergh]

Good video again! And nice tshirt! 😀 But there is one question: I was tought that it is very important to ground a shield in both ends. So what is the difference when measuring?

[@MachOneDesignEMC]

Thanks Tomas, you are very kind. Yes, there are so many myths about terminating the shield, which we hope to answer in future videos, stay tuned. I just need to find/build some circuits to prove the point.

[@tomasbergh]

@@MachOneDesignEMC Super!

[@donnymac575]

Nice shirt.

[@MachOneDesignEMC]

I think we will start designing some really fun EMC SIPI related shirt and sell them, just for fun or charity.