#2038

[@johnwest7993]

The person who invented the R2R ladder must have had a smile on their face for days at the elegance of their design.

[@JaenEngineering]

Another thing is to invert the voltage on the MSB intput. So instead of going to +5V, you go the other way and go to -5V. Combined with a 2's compliment input you should still have a ~5v p-p output only now centred around 0v. Great for synthesising an analogue signal without the need for a coupling cap allowing you to apply dc offsets if necessary.

[@mikesradiorepair]

The first vacuum tube curve tracer I ever built used a R2R resistor ladder and a CD4040 binary counter. Used 3 bits of the counter IC to create 8 ( 2 X 2 X 2 = 8) grid bias steps for the tube under test.

[@bayareapianist]

I did the same using cd4024 and R2R ladder and I got up to 128 steps. If I wanted fewer steps, I would move the reset line to pins equivalent to 2^n. But you must had had a DPDT to switch for PNP transistors to reverse the ladder for BC and CE voltages.

[@edmaster3147]

And very casually introduces a significant design choise...great teaching. Thanks IG

[@WB0RIO]

Thanks for the fun video. It seems like the practical limit to an R2R array is around six or seven bits if you use 1% tolerance resistors, it is a tricky problem to see how the tolerances combine . Resistors from the same batch would probably help, as would making the R or 2R parts out of series or parallel resistors from the same batch. One could take it further and sort the resistors for more precise tolerance. The advantages of a monolithic DAC chip become fairly obvious as soon as you need more bits of resolution. I've used the Maxim MAX522 dual 8 bit SPI interfaced DACs to good effect. Here's a suggestion for your chip of the day series: the Panasonic AQV252G, a solid-state AC or DC relay that can pass up to 5A in the DC configuration.

[@QuibizOwl]

I think I’m going to memorize this for a usecase where I would like the adjustability of a potentiometer and the relatability of a dipswitch with fixed resistors

[@Stuff_And_Things_0]

Great vid. I like the explaination of the cmos and ttl at the end. Thanks 👍🏽

[@TheTrashcutter]

Thumbs-Up for ancient GAL usage

[@louiskatzclay]

I really enjoyed this! It is the sort of arrangement that I like. I am sort of frantically interested in sequences like this arrangement of resistors. I have an interest in seeing the relationship of the power loss, count and voltage. I may have to work on it. Mr. Gardener/SK my highschool Electronics would be proud. It should not take long. Those really involved with the subject probably already know these relationships. I am not that clever.

[@Agrivv]

I love “frantically interested”. Going to steal that one

[@andymouse]

I adore this channel and everybody loves 'chip of the day' However, this is without a doubt the most confusing and scary description of R-2R I have ever seen !

[@johnwest7993]

It was the Halloween video!

[@Olaftr]

I thought most TTL used a totem pole (pull up and pull down transistors) for the last stage. You might still see different impedance positive or negative but it should be better than a resistor pull up. I also thought they overlapped both transistors briefly to speed switching, hence the need for a capacitor at each chip. Granted this is remembered from classes 40 years ago 😊

[@IMSAIGuy]

The pull up has an added resistor. Check the data sheets

[@BMRStudio]

One time, I got this as a homework, with 7 segment display driver. The task was to make music with it. Turned out super cool! That was my first digital synthesizer! 300KHz sampling rate! 7 bit! We had lot of fun with different equations in the Commodore Plus/4 assembly lines. Off course we killed the user port with the Russian high voltage nixie driver transitior bridges 😂

[@ToumalRakesh]

I used to do this on parallel ports before I got my firat soundcard, a Gravis Ultrasound...

[@stamasd8500]

ah yes the Covox sound thing.

[@clems6989]

OK now you cant oil the chair. Its your trademark.. Good video I have never seen this..

[@myname3463]

Thank you for the video. Very nice technique.

[@TheLemonhawk]

I would say that you should use a grey code counter output, which only has a 1 bit transition, but then the resistor network would not work!

[@SeanBZA]

My first pc sound system used this

[@ggripen]

What are the limitations of such DAC (in terms of frequencies)? I'm currently using an FPGA board to sample ADC values from an function generator and then I want to use a DAC to output the equivalent signal, it would be fun to try out making a 2R Ladder.

[@jim9930]

10bit 50MHz with 1/8 watt metal film (picked to .1%) on a breadboard is about the practical DIY limit with 74ACxx gates. Junctek DDS uses chip R's 12bit to 60MHz (cheap China import ~1% thd). The problem becomes stray C's and L's with switching glitches and gate output impedance nonlinearity. I have built 32 step walking ring counter sine synthesizers to 1MHz with Hcmos that have

[@3cu14rs]

Show us a filter that makes that a proper stairstep signal.

[@MobiusHorizons]

It seems like the voltage at the top of the stairstep is closer to 4v than (15/16 * 5)v which would be ~4.7v. Is the voltage input low or is something else causing the drop.

[@IMSAIGuy]

TTL devices never go up to 5.0v output level. different from CMOS

[@uni-byte]

Yeah, these DACs are not great on TTL. Further, most TTL outputs across a single device (e.g. 74LS374) are not matched well which causes more headaches. They work great with 74AC logic though.

[@humidbeing]

Some TTL has totem pole outputs.

[@johnwest7993]

Which still have a pull-up resistor.