Introduction to Inverter EMC Simulation

This is an introductory lecture about the simulation of Inverter EMC.
Contents:
00:00 Introduction
00:40 Motivation
02:58 System schematic
04:53 Inverter circuit
07:07 Noise source and propagation modes
11:30 Schematic results
12:26 Switch model
15:38 Capacitor parasitics
17:27 Capacitance to PE
19:06 Filtering options
24:47 Realistic model
26:10 RLC simulation
29:57 Full-wave coupled to circuit
33:41 Comparison RLC vs Full-wave
36:05 Current visualization
39:07 Component placement
41:25 Simulation & measurement
43:15 Summary

[@mwengineer2577]

Subscribed. Definitely coming back with hope that more of such detailed stuff will be posted. And off course many thanks for sharing.

[@yogeshsolunke606]

Very much informative. Thank you

[@prof.gregoryalmeida2825]

Nice presentation. Do you have any video or link suggestion in where to find the desig guidelines or rule-of-thumb to Pi-Filter and Cy caps ? Thank you.

[@AndreasBarchanski]

I would use a circuit simulator to determine proper values.

[@jayakrishnanharikumaran3758]

Should a parasitic cap be modelled from the switching node [mid point of the sw leg] to the PE?

[@AndreasBarchanski]

We place the port at the position of the cap (as in the layout) and then apply the parasitic model on the schematic.

[@jayakrishnanharikumaran3758]

How was the noise separated into common mode and differential mode in the simulation? Do we apply a math operation Vp-Vn = diff noise and Vp+Vn = CM noise?

[@AndreasBarchanski]

yes, as simple as this

[@krisjk999]

I have a methodology question. It is said that the earlier emc issues are considered in the design the better. However things keep changing as the project develops. What can be done during the mechanical design phase and at the end of first proto build to make maximum use of emc design work

[@AndreasBarchanski]

That's exactly the advantage of a simulation model: it can be created before the first prototype and it can be modified when changes occur. Of course at first stages some data is not yet available and needs to be guessed, still a good simulation model should already deliver reasonable estimates.

[@muh.nuraqillainzaghi8788]

hello mr. Andreas Barchanski, how to show the frequency domain graphic about common mode and differential mode? what task do you use?

[@AndreasBarchanski]

You can do this for all tasks in post processing. Just use Mix1D template based post processing and add or subtract the results.

[@muh.nuraqillainzaghi8788]

I'm sorry Mr.@@AndreasBarchanski, i use "Transient Task" but the result is a "time-domain" result. Could u help me to learn how to show the "frequency-domain" result like your video? thanks, sir.

[@muh.nuraqillainzaghi8788]

hi, thanks for sharing about EMC for inverter. i have question about inverter circuit, how to import spice model for mosfet? i have tried but get error.

[@AndreasBarchanski]

SPICE language has many dialects and keywords specific to a dialect. Sometime files are also encrypted, so it depends on the particular error to understand what is the problem.

[@MJ-vt1kp]

Hi thank you for this. Something for a discussion: sometimes there is also a filter after inverter bridge for filtering noise from the motor, so you probably do not have noise created by the motor?

[@AndreasBarchanski]

No, I don't think that there is noise created by the motor. The motor is not an active element. However, the noise from the inverter will also propagate through the motor cables and the motor itself, so the filter between inverter and motor is suppressing noise propagation on the motor side.

[@MJ-vt1kp]

@@AndreasBarchanski i think that depends of the type of the motor and interactions on its Internal components also you can have resolver in the motor housing that could be additional source and sink of the nosie.

[@muh.nuraqillainzaghi8788]

hello mr. Andreas Barchanski, may I get to know about how to set PWM for gate mosfet in CST Studio Suite? Is that import result from other software, or can set in CST directly?

[@AndreasBarchanski]

If you are on the schematic, then go to the post processing ribbon and select the down arrow in the EMC button. (CST 2023)

[@sravanslv5191]

I m interested tolearn. Could please suggest any training centres?

[@AndreasBarchanski]

For general EMC, I think Learn EMC webpage is very good. For simulations, Dassault Systems offer trainings (not free of charge)

[@junghwalee8343]

Hi Baha!!

[@JoannaPirieHill]

Great video, Thank you. Why use a filter in the first place? Do we really care about the conducted RF currents flowing back to the battery? At RF frequencies the battery is an array of capacitors and the length of the cables are inductors. Okay, so there are high RF currents in this cable. Put these currents in a suitably designed transmission line. Can your software be used to design a transmission line cable with appropriate DC and AC capabilities that would constrain these currents without creating harmful radio interference?

[@AndreasBarchanski]

Hi Joanna, I have seen your posts regarding this topic on LinkedIn. Of course you can use our software to design proper transmission lines to suppress the differential mode. But thats only half of the problem: Just the stator of an EV has typically around 20 nF capacitance to the housing (that is connected to the chassis). Thus, you will always have a significant common mode emission that can not be supressed by improving the desing of the DC cables. You still need filtering/shielding.

[@JoannaPirieHill]

​@@AndreasBarchanski Yes, the common mode capacitance of the motor is a big issue, but so are the leaky cables and there are other issues that will need to be addressed to keep EVs from polluting the AM band. To address the common mode issue; As I'm sure you are aware, balance in a differential system is critical in preventing differential to common mode conversion. The 3 phase 3 wire wye motor control is not balanced. To be specific the number of on high rail transistors is not always equal to the number of on low rail transistors. Hence the shunt capacitance to chassis of the rails is changing from 40nF/20nF to 20nF/40nF. And with this change the chassis current has a nasty pulsed current on it. I have to wonder if a 3 phase 6 wire motor with a 12 transistor inverter would help. With full rail voltage accross the windings the amount of copper could be reduced. This would offset the cost of 6 more transistors. It is a question for the motor folks to answer.