Is This The Future of Drawing Schematic And Doing PCB Layout?

An interesting way to design boards - writing code. Thank you very much Duncan Haldane.
Other Links:
- Duncan's LinkedIn: / duncan-haldane
- JITX website: www.jitx.com/
- Code from the examples: github.com/JITx-Inc/jitx-cook...
- FEDEVEL courses: fedevel.com/courses
Chapters:
00:00 What is this video about
02:06 Why to design boards through code
07:01 DDR example
11:53 Starting a new project
28:48 Import to Altium
30:46 About JITX
33:36 Benefits of designing boards by writing code
37:36 Designing a voltage regulator
48:57 Check report
52:44 Libraries
58:10 How does it work
1:07:53 Routing
1:11:09 Placement
1:14:26 Length matching
1:19:36 Keyboard example
1:29:43 Back to the DDR example
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- Robert

[@cescozep]

I really don't understand all the negative comments, so I am going to leave a "positive" one. I have been wondering for years why every single engineers is doing and re-doing the exact same calculations, for the exact or very similar component, for very similar applications instead of having some automatic way to saying "this is what I want, calculate everything", and this tool does it. There are a few tools like this one coming out at the same time (basically: components are treated as a database, the design is treated as an optimization problem, give the constraints and get back a circuit) an I am very excited to see where it goes. If together these tools can save me hours of browsing through datasheets, doing trivial calculations and make checks automatic, I consider it a huge win. Yes, the price is insane. Also, the single hobbyist is not the target. Thanks for the very informative video.

[@RemiBusseuil]

You are gonna have to do the calculations again anyway... Do not fool yourself into thinking that you will not have to verify what the machine did

[@cescozep]

@@RemiBusseuil do you re-do by hand all the calculations that you do in Excel? or using the calculator on your phone? or do you simply re-check that the input values were correct? I expect that using these type of tools will be the same: I will give some inputs, triple check them and then trust the results (and if I am really paranoid, maybe check a few calculations the first time I use the tool, just to make sure I understand what is happening under the hood).

[@MrMartins159]

I don't know about schematics or possible tests, but that layout is terrible. If that which one are in they homepage are the "best one", then oh my god. I mean arduino level electronics would work fine, but it is like hedgehog and that is from visual aspect, imagine what kind of problems would arrise in high speed dense boards. I wonder what comments would be from Rick Hartley or Bogatin about that monstrosity :D Jesus :D

[@cescozep]

@@MrMartins159 you are judging the layout from an unfinished example of a software which is basically new? The phrase "this is the worst that this technology will ever be" is very common for a reason. Try to extrapolate 1-2-5 years in the future and try to see the potential. And just to be clear: I am not saying that this is perfect, or that it will work perfectly or that it will become a de-facto standard way of doing PCB development. I am just glad that there are people trying to automate this type of work and trying to push the boundaries of what can be automated or the boundaries of where the tools can help us.

[@MrMartins159]

@@cescozep Yes I agree in regards of potential, but I'm judging at this moment, if i had to pay ammount they are asking and afterwards had to do a lot of cleanup then I see no point of that. That of course depends, for some that ammount probably are pennies, then why not, take to play around.

[@muhdiversity7409]

I'm an electronics engineer. My entire career has been spent writing code. As someone that has been in the trenches writing code for very large systems for a very long time, I can tell you that I am thoroughly sick of writing code. I could write a long essay as to why that is. That said, isn't VHDL and Verilog a high level hardware design language for how to interconnect and simplify logic? It would make sense that that paradigm can be exported from chips to the PCB level. My concern here though is where VHDL and Verilog are more or less standard languages I'd be leary about using something that is proprietary and not standardized. Last thing I need is for my designs to be held hostage by a single vendor.

[@Entritarus]

Writing a good testbench in VHDL can sometimes really be a pain in the arse. Thank God for VUnit.

[@panegyr]

I deeply feel this comment about being an electrical engineer sick of writing code.

[@cycix]

Cadence has had schematic generation they called io synthesis for schematic capture for probably more than 10 years (fpga designer). The issue getting a non-proprietary library built that has all the io info so it remains portable between tools. The next step after the schematic and first pass layout, but before spinning hardware, should be system C or other simulations to test or start software before making hardware. To do it though you need better models than just io models.

[@donald7941]

How bout an opensource version of this? 10k a year is insane lmao. Hopefully the open source community will eventually have a kicad plugin to do things similar to this.

[@HennerZeller]

I've recently come across a similar OpenSource tool in a similar space called Atopile.

[@nabajour]

Haven't played with it, but there is another project I read about on hackaday called atopile that seems to be open-source.

[@sir_urx]

10k is what was to pay for perpetual Mentor graphics designer license. Nowadays all want subscription and online connection which is bad if you have any issues with net or want to work on countryside. Usually bad things happen when it's most critical to move fast.

[@avinadadmendez4019]

Companies have gotten greedy, they want to sell a single piece of software and live off it for life

[@JosefRaschen]

I also thought that. There is of course nothing wrong, if they are selling this as a product. For KiCad, a scripted description of schematic components would be a starting point and a big time saver. I have no idea how many hours I have already spent creating symbols for large pin-count chips. The next thing it needs is some sense of physics, so that you can attach properties like maximum current or thermal conductance to pins and the ERC could warn you about bad connections. The next step then could be to generate connections in the layout by using this information.

[@Chris_miller192]

That’s so cool. Those freaky wiggly traces will be very recognisable so it’ll be interesting to see which PCBs use the tool.

[@exapod23]

I can't wait for an actual hardware engineer to design tools for hardware engineers. A lot of this startups totally miss the mark by being built by software people that really have no idea how the industry and product development looks like.

[@vincei4252]

Have to submit an application to use the "Free" version. Really ?

[@sadteeto]

Big fan of the passive components optimiser.

[@rokiedecentra9656]

is this like latex but for schematics?

[@stickydone]

Odd question, why not use an established language like Vhdl or verilog? I feel like it is perfect for schematic capture

[@Nik930714]

I'm excited to see where this or similar tools go.

[@RemiBusseuil]

I have no idea if this will pick up but in its current state I would never use that stuff. Maybe linked to an ai which helps you to do stuff maybe but writing and learning all these syntax no thanks. The best use i would see of this would be as a module in a schematics capture where manufacturers would provide boxes with their parametric design

[@Apersonnamedme]

Can you export designs from say altium without having to write code?

[@TheAndrian463]

Hmm, I used to do many years ago AHDL code for state machines to be put on EPLDs as a prototype before implementing an ASIC from a chip manufacturer. Things have moved on a lot since those days.

[@Andy-tp9sy]

This method seems incredibly efficient.. at incinerating investor cash.

[@ProtonOne11]

Seems a bit early to jump in on that hype train. I can see some benefits for some applications. But i think i would still need to verify a lot of things manually to make sure that the code that generates everything actually does what it's supposed to do. We would basically have to build up the knowhow to use this tool efficiently, build the library of components we have in stock and use in our designs regularly, develop new prcesses that work around this toolchain to integrate it into our desiign workflow, and then actually build a bunch of designs and boards to verify in physical hardware that the output is actually what we expected. It's not easy to dedicate that time and money to something that may or may not be supported or even required anymore in a few years. At least with our current toolchain and design process we know we get working designs that we can push thru certification and sell to the end customer on a consistent rate. There is always room for improvement, but throwing out the old well understood, tuned and working machine for a shiny new fancy black box is asking quite a lot i think.

[@robertpeters9438]

Sounds like a compiler analogous to chip design but for boards.

[@hisham1269]

they should try to partner up with hardware companies that develop the chips too, they know how to have their chips connected it best. thinking of it similar to the sections for layout considerations usually added in the datasheets.

[@JITX-Automation]

This is a great idea! (and we are doing it) People that create reference designs also could use more from their tools.

[@hisham1269]

@@JITX-Automation I'm still a student but will keep a close eye on this. I really liked the semi-automated nature of the layout, it looks like a good balance between maintaining control and having the routes auto-complete. best of luck :)!

[@Black26Jack]

I think VHDL is a right tool for such thing. No idea why need invent wheel again :)

[@moseschan6363]

I think the thing is if your goal is to monetize it maximumly, electronic engineers are not gonna contribute to this platform, converting experience into something unfamiliar takes time and effort. It's like a born-dead product. The idea of automatic modular parametric circuit design is great, but it cannot be achieved without contributions from great people.

[@YOGiiZA]

Can you have an Ai use computer vision to read electrical schematics and understand them? This would be excellent for helping technicians troubleshoot machines

[@graykimchi]

It looks like this is mostly piggy backed off of KiCad to do most of the schematic and board generation. Im not an expert on the backend of KiCad but I don't see anything new about this as afaik all KiCad files are human readable text "code". Please correct me if I'm wrong

[@sir_urx]

You need to compare new complex component entry speed with other EDA-s, this takes time. Auto-routing is old thing already and is question of taste. 3D EM simulation is needed for high-speed traces anyway if you want to analyze impact of manufacturing tolerances.

[@midnightwatchman1]

what is the advantage of coding a whole schematic

[@powerHungryMOSFET]

Will the time taken for coding and debugging the bugs less than manually desiging the board? If coding taking much time then no point of this software. I always feel comfortable desiging it than coding it

[@l3eatalphal3eatalpha]

2:16

[@powerHungryMOSFET]

@@l3eatalphal3eatalpha another reason to loose job to AI ?

[@gearbraniac]

seem like a latex for math or verilog for chip, this seems like a for circuit.If we can train it as ai agent it will be great

[@robertpeters9438]

The code screen is not legible.

[@andrewgrillet5835]

I have more than touched an FPGA, I have designed with them for more than 30 years. I would never consider anything but schematic entry. Yes I have used Verilog, etc - Its hell.

[@ste3191]

Useless for analog circuits.

[@benlpayne]

Why would you say this? They said it was ideal for high frequency digital circuits and at high frequencies the challenges become "analog", the digital signal can't make clean '0's and '1's any more. Also it's all based on defining contraints and letting tools optimize for these, there's noting inherently digital or analog about that. So to me this sounds ideal for analog circuits.

[@coen270]

@@benlpaynewhile digital circuits are made out of fairly standard building blocks, this does not apply to analog circuits. there are so many non-standard parts which each behave differet

[@electronics-xe7mi]

Cool, PCB programming instead of CPU programming

[@hipsterbm5134]

$1000 a month BAHAHAAHAHAAHAHAAH

[@vincei4252]

I was thinking the same thing. When I saw the part about the Enterprise version being airlocked I knew everything I needed to know about the lower tiers and stopped watching.

[@kamejoko80]

That’s cool idea, however machine routing is really ugly, it takes long time (not now) to has a beautiful layout like human do.

[@user-pi6lo6km9b]

$1000 a month?? LOL

[@EuphoricDan]

nah

[@annaoaulinovna]

pcbs are so shitty bad designed items. an improved wirebonder can minimize and make them better under an epoxy layer. some ewil electronics companies making cpus without rams and memories. all items should be packed together and external input-output pins should be grouped well inside chip packing factories.

[@bobby9568]

Crap software 😂

[@yyzz9135]

Not useful not worth

[@LeandroSehnemHeck]

The way this guy speaks is horrible to understand, he doesn't complete one single sentence.