L-3.8: Fully Associative Mapping with examples in Hindi | Cache Mapping | Computer Organisation

[@yamisharma7226]

I'm first sir. Ak aap hi ho jo KZbin pr cs student's ki regularly help kr rhe ho. Thnku again nd again sir

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Aap jaise content creators hai jo hum logo ko humare college se jyada accha padha rhe hain. Please keep up the good work. Aapka padhaya hua bahut acche se samajh aata hai. Thank You : )

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Thank God ... I found this video on time ... Aap bhagvaan ho sir ... Thank you so much ... Aapne COA ka dar nikal diya pura ... Love from Mumbai💗

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Aur Sir ka bhagwaan mai hu

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[@hamid_ra.za7]

Notes:-------- What is Fully Associative Mapping? “Every memory block can be mapped to any cache line.” The fully associative mapping helps us resolve the issue related to conflict misses. It means that any block of the main memory can easily come in a line of cache memory. Here, for instance, B0 can easily come in L1, L2, L3, and L4. Also, the case would be similar for all the other blocks. This way, the chances of a cache hit increase a lot. Now, let us assume that there is a RAM (Main Memory) size of 128 Words along with a Cache size of 16 Words. Here, the Cache and the Main Memory are divided into Lines and blocks, respectively. Every block Line is of the size 4- words. It is shown in the vdo given as follows: . . . Physical Address Since the main memory has a size of 128 words, a total of 7 bits would be used for representing the main memory. Thus, the Physical address would be 7 bits in size. Given below is an example of the fully associative mapping of W24 of the B6: . . Since the Block offset represents the Block size, 4 words of Block could be represented through two bits. Since the Block Number represents the Block in the main memory, there are a total of 32 blocks in the main memory. Thus, 5 bits would be required here to represent 32 blocks. We do not need to divide the Block Number into Line Numbers and tags. It is because, in any cache Line, any main memory block can come. Thus, Block Number is our Tag. A tag represents the Block Number as the 32 blocks’ main memory. Also, any block can come in a cache line. This way, any block can come from 32 memory blocks in any cache line. Thus, 5 bits would be required whenever we want to represent a block in a cache line. Note: In case there are a total of 128 blocks, and the size of every block is 8 words, then, Tag= 7 bits Block number = 7 bits Block offset = 3 bits . . . . Searching for a Block through Tags (Cache Hit or Cache Miss) Suppose that a CPU generates an address 1111100 for a main memory of 128-word. The first two bits (00) here would represent the Block offset, and the last five bits (11111) here would represent the Tag in Cache memory. Since the required word of the memory block can be present in a line of cache, the number of the comparator is increased. Here, we match the tag of the given address with the tags of all the cache lines. In case it matches, then it’s a case of a cache hit, or else, it is a case of a cache miss. Here is the Cache Hit for the address (1111100): . . . Shortcut Formulas Comparator = Total number of lines Physical Address (PA) = Block Offset + Tag The value of the comparator in a fully associative mapping is equal to the total number of lines. It is because any main memory block can come in any line. This way, we can compare the tag of the given address with the tag of each and every line in the cache.

[@rajatgaming1503]

Thanks bro ❤

[@habebayimran16]

​Awesome .. Y dont u type like this for all three mapping 😹

[@085_RahulMishra]

Merlin AI Power 😏

[@trishna1051]

Super duper teaching sir👌👌👌👌

[@abhijaysaraswat83]

Awesome explanation loved it!!!!

[@animationcrust1993]

Thank you sir for incredible explaination ☺️❤️

[@rechaly6336]

U r simply amazing sir 👍

[@raj1307]

Seriously Outstanding!

[@abhishekabhishekgond6137]

Thank you sir, it was really good understanding video..

[@waron1240]

Before this video please see video 3.9 for better understanding😊.

[@Im_Urs-qs7lr]

What an explanation sir. Simply superb.

[@amitmodh167]

🏆🙏🔝 perfect explaination

[@nirdhast]

very nice explanation for student who got passed B.E. degree but not understood what was coa

[@ayushiydvKG]

9:54 thanks sir

[@arno7925]

THANK YOU SO MUCH FOR THIS VID YOU SAVED MY LIFE (T~T)

[@prasisangdembe99]

Amazing Video.Thank you sir.

[@akansharajput_3715]

Thank you so much for the simple and amazing explanation sir!❤

[@ayushisrivastava2268]

Thank you so much for this video. The concept has been explained really well.

[@Dont_know_wt]

Ur old student back... Phly sem pas krny k lye pdhna shuru keya tha bt lockdown ki waja sy esy hi pas hogye 2sal.. Now m here for gate😍😍.. Mny yahi seekha isy phly mujy kuch ni ata tha Tag field ka concept

[@sratnamanjari244]

Thank You so much Sir 😊👌

[@nasrinaktar1074]

Thanks you sir for incredible explanation ☺️💙

[@nilotpaldas6820]

The same topic in my college was made to look like rocket science

[@hilalshah4985]

outstanding zabar10 sir.

[@rounak3239]

Gurujee shandar jabardast zindabaad

[@sai_durga-n4h]

sir , aap ko zindegi me ek baar jaroor milenge aur aapke charan chunke aasirbad jarur lenge .. agar sach me 1 saal pehle pata hota ki itni achi explanatory video youtube par he then believe me baht gain hota...

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Best explanation sir

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Nice explanation

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Superb 👏👏

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Amazing explanation ❤️

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Awesome explanation

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[@computerscienceandapplication]

Thank You

[@EAR_blessing]

Concept clear thanx sir

[@umesh3579]

Thank you 👍

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🙏🙏

[@anushkasharma1018]

your video saved me today in my exam.

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Gajab bahuuuuu

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🎉🎉❤

[@naitiksingh4730]

Sir for 3rd grade computer teacher is it enough to cover theory part of COA or should i go for numerical as well....??

[@GateSmashers]

Question from addressing mode, interrupt, Cache, number system

[@naitiksingh4730]

@@GateSmashers that all i will do sir ..but should i do numerical question or only theory part is enough...?

[@Abhi00111]

what do you mean by 3rd grade

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sir please provide microprocessor and assembly language programming videos please sir

[@ayepea4471]

Amdahl's law ,iron law, cache coherence ,cache optimization

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Thanks sir ...

[@ShaliniSingh-xc5rn]

Thnku sir

[@vinitasingh1117]

Thank you sir

[@KishanKumar-xx5kr]

Sir aap COA k playlist ko phir se arrange kijiye because topics interlinked nhi h Kuch video jumbled ho gaye h to pichle video se next video ka topic link nhi ho pata aur samajhne me dikkat hota h Baaki content to superb hai

[@asitkumarsahu5211]

Thanks sir

[@vinodkhorwal1306]

Sir can u swap lec 3.8 and 3.9.

[@bhuppidhamii]

Yes

[@Abhi00111]

Sir bahut hi acchi video hai aapki lakin sayd wo disadvantage me complex circuit ho sakta hai q ki computer to parallel compare karta hai . please clear karen

[@shrustis5240]

if main memory =128 KB and cache memory is of 2KB with 16B lines .and uses associative mapping . What would be the # of bits used for Tag for each block? Ans for this question sir ?

[@it41tanmayaron26]

As for each cache line, no of bits in tag is block no. of main memory. We just need to calculate no. of blocks. 128,000log2 - (2000/16)log2. Ma'am, I think this will be the answer. Kindly tell whether I'm right or wrong

[@mrprofessor8449]

Mera aaj hi exam hai😂

[@ujjwalchaturvedi3925]

Yes

[@pritijadhav2625]

Kal exam 2:30 pm ko he Mai ye dekh rhi hu 😢

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Me bhi dekh ra hu 😅

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Same condition

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Us Mera Sobha 9 baje xam😢

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Hello

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[@pranjallamsal2290]

❤️

[@computerscience8988]

Great But Last me bola hit ratio badh jayegaaaaaa how?

[@random2059]

sir keya cache controller 3 o mea se koi vii mapping use karsakta hai..(direct ,fully..,k way) ya phir yea paile se decided hota hai..ki kon sa mapping use hoga... please reply

[@mumukshu-5EEk]

Tumko cache me hit mila hoga, mujhe lecture se hit mila. ;)

[@yugandharajagtap5380]

Aaj 1hr me exam hai😂

[@faizansaeed8449]

Sir............

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sir ek doubt....ek line mein kitne blocks ayenge

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sync vs asynchromous pipelining pipeling performance

[@015hariraj6]

English lectures help who don't know hindi sir!!!

[@murali.j8970]

sir but how line size equals equals block size,as line contains 32 words

[@hitesh8266]

Kal Exam Hai 3 38 am baje hai

[@razamalik4703]

Thank you sir merry request hai aap sy KY chapter 7 ba part 2 explain kr dy please database design using semantic object model

[@kunalchander3842]

Sir line no. kaise pta chlega ?

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Exam in 1 hr🥵

[@Pawan-kg2rs]

Exam in one day🥵

[@noob_editx_]

Sir I have some questions can I ask??

[@GateSmashers]

Ya sure..

[@motivate_now108]

sir it fully associative or only associative pls replay🤥🤥🤥

[@Saktiprasad-rh8os]

Bhai 1 baj rahe hai.... So jao kal subha exam hai 😅

[@vvvvvvvvvvvv2001]

Just an off topic thing to be noticed that he looks a lot similar to Krunal Pandya 😂😂

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Still he teaches very good no doubt about that

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Thode der bad exam h 😂😂 2x bhi slow lg rha h😂😂

[@AhmadRazaUnique]

Aapki teaching skill to thik h but topics detailed nhi hote. Please explain the topics in depth. Hope you would take it in an optimistic way...

[@beastgamer2k474]

Kal viva hai abhi 1.22AM

[@amanjaiswar1428]

Kal exam hai 2.30 ko

[@HustlerMohit]

Is mapping me to phir cache miss hoga he nhi.

[@baljotsingh4013]

Haan but overhead cost badhti hai because vo har line ke tag se match karega

[@nehapatange803]

Jeero

[@ayushSharma-fx3pf]

1 second bad exam hai

[@shivakarthikrathod2026]

فاطمہ سرور فاطمہ سرو

[@princeKumar-qe6sm]

Notes:

[@princeKumar-qe6sm]

In direct mapping Address divided into 3 parts But here only 2 parts

[@princeKumar-qe6sm]

Here, Block number is tag

[@healthywealthy5430]

I never praised any one

[@simransingh6137]

Thank you sir