Lecture - 17 Cache Organization

[@brub8060]

Dear professor, thank you so much for the best explanation of direct mapping! I'm not your student but thanks to you I got this concept, as many other students are registering in this comments section. Greetings from Brazil.

[@raviscjp]

Sir, You are an authority on the subject and yet so humble.All your lectures are highly enlightening and absorbing interspersed with subtle insights which make the subject appear all the more simple that it actually is. All in all, a great teacher. Look forward to more from you. Thanks.

[@kotresht]

What an authority to explain things step by step with patience. I need not have to go through this chapter again. One hour passed like 1 minute.

[@SachinVerma-xo4fj]

height of Brilliance thanks IITs... thanks Prof.

[@DeepakAggarwal77]

The best explaination on Direct Mapped Cache..Can't be better :)

[@obelix_gaul]

Gosh, lecturers like this should be working in normal colleges, what is the point in having great lecturers teaching students who are already brilliant in IITs..

[@deathbud9414]

Yes,thanks for the input.I'll be now working on the transfers of these lecturers to colleges in your neighborhood.

[@obelix_gaul]

+Death Bud don't die in the process..

[@rj-nj3uk]

@@deathbud9414 any progress?

[@gauravzerogravity]

i was messing with morris mano i didnt get any thing now after this vid now its clear thank you countless times

[@sanghamitrahota1162]

gauravzerogravity same here 😂😂😂

[@katariya1000]

if such videos please add those its very nice and language is also clearly understandable by the student so i am very thankful to the user

[@arjunviswan]

Valid bit is jus to denote the presence/absence of data in a cache memory location.viz 1 or 0 respectively.

[@truckcompany]

Just came back from uni and was so annoying because I couldn't understand my lectures Indian accent when she was explaining the CPU. Then I found this video.

[@14janvier86]

Nice teacher,explains in a very simple way.

[@samanthalarson8355]

Finally understand much better. Thank you

[@satheshbm92]

deivam saar neenga :)

[@naveenkumar-re1ky]

Sir, Thank you for the clarification about cache memory

[@viveksahu8508]

Thank You very much sir and superb teaching and most import thing is free of cost Thank You :)

[@elemele4real]

Thanks you very much that was very very very very very... helpful. Zeen.

[@sonnix31]

Very good explanation. Thank you sir.

[@katariya1000]

ya u r correct gaurav

[@shivg2519]

Awesome lecture... thank you sir...

[@gaganxsaini]

really a nice lecture....thank you sir....:)

[@yogasrinivasreddy504]

Sir pls explain why a Dirty bit is used for cache mapping?

[@sanghamitrahota1162]

Thank you, sir! 😇

[@giothudong]

Hi, Why do we need 16 bits for TAG? Why do we use 15 bits for TAG and 1 bit for valid bit for the remain 16 bits?

[@programhistory]

THIS VIDEO IS GOOD

[@madgaskin]

excellent!!!!

[@arjunviswan]

Prof.Raman,where do u live now?..still at IIT? We seriously need profs like u

[@arjunviswan]

well said

[@jyoti4939]

thanku sir....

[@kuanlinpaihan]

thank you so much!!!!!!!!!!

[@truckcompany]

It's sarcasm, I just had a very bad day then. I ended up passing that class just. I personally just find Indian accents very hard to understand.

[@SravaniVadlamani]

Thank you sir :)

[@arjunviswan]

is that a compliment or sarcasm?

[@yogendra571]

why 17 is miss in second time, it should be hit ?

[@yogendra571]

Perfect

[@funwithupsccse9925]

then do u mean always the locations are replaced then once 22 is came to cache.....other say 32 from same location replaces 22..???/

[@earthhtrae]

danx a lot sir :)

[@praveenkashyap2598]

Thank you Sir....

[@shaminali769]

not either!! haha wonderful lecture.