Non-Uniform Memory Architecture (NUMA): A Nearly Unfathomable Morass of Arcana - Fedor Pikus CppNow

[@riffshyperion]

Great presentation. Would love to see the rest!

[@guiorgy]

Great talk, shame can't see the rest

[@DmytroDukov]

Awesome talk! Lots of intricate details and valuable insights. Thank you!

[@BoostCon]

Very glad to hear that you enjoyed it! Thank you for your comments.

[@LeDabe]

NUMA seemed like a reasonable solution to continue providing higher memory throughput. Assuming the software is aware of the NUMA.

[@philmarsh3859]

I'd like to add NUMA awareness to the EM solve openEMS which is severely memory-bandwidth bound

[@ПётрБ-с2ц]

43:34 are threads acessing memory with constant speed? because if they go out of sync then there is additional performance penalty I guess you even admit that 5 minutes later without mentioning that it will affect total bandwidth as well I guarantee that if you implement same read pattern with same thread timing using only one socket you get terrible bandwidth as well because the limiting factor is not inter-socket interaction but DDR structure itself

[@codures]

1:31:16 That typo in the title could have been much much worse 😂.

[@rgarciaf071]

Great talk sad it got cutout

[@ПётрБ-с2ц]

24:20 this graph would definitely look better in totals, not per thread

[@ПётрБ-с2ц]

36:25 "the ratio here is about 50" how in the hell it could be fifty? it's a fraction of the cell height which is 10x the Y is logarithmic

[@killacrad]

What is precisely meant by no interaction between NUMA nodes if only talking to L3 cache at kzbin.info/www/bejne/nGG9fHWrqMZneasfeature=shared&t=2005, in terms of effect on memory bandwidth?

[@FD286]

Funny numa in Japanese means “swamp” : D