NXP CAMPUS CONNECT 19 July 2022 Memory System Enablement - Validation, Tools & Software

The video covers about NVM/DRAM memory requirements in Automotive applications, DRAM (LPDDR4) controller initialization, A typical cycle of validation, DDR performance enhancement approaches, DDR traces on PCB and how to enable in software applications using DDR Tool. At the end, there is a session of DDR tool interaction with S32G2 evaluation board.
The take-aways from this video would be memory requirements in Automotive applications, how DRAM interfaces is calibrated and how the DRAM enabled in the software applications after a typical validation cycle.
Speaker: Aditi Sharma & Ajesh Kumar, NXP Semiconductors
Aditi Sharma, a Lead SoC Validation Engineer, having 11+ years of industry experience in SoC functional validation, part of the NXP SoC Design team. She has experience in validating Memory IPs and Ethernet subsystem on automotive chips.
Ajesh Kumar, Principal Engineer - Systems and Applications, Having 17 years of industry experience in Applications, Customer enablement and support. He has experience in automotive Vehicle Control and Networking Solutions.
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