Overvoltage protection of PWM half bridge: Misconceptions and facts

[@olivalle]

Thank you for your very practical, non-dogmatic approach, it's the experiment who is validating the academic approach. I appreciate it greatly

[@sambenyaakov]

Thanks Olivier

[@Rodderick45]

Great video Sam. Been working with switch mode converters as a maintenance power electronic specialist for the past 28 years on a very large scale such as the propulsion system on light rail trains as well as industrial controls in the CNC Aerospace industry. This is by far the best explanation yet that I have seen on you tube that delves into the details of power converters with great emphasis on the very important snubber circuits. Keep up the great work.

[@sambenyaakov]

Thanks for comment. Responses like yours keep me going😊

[@juggernautforce]

Found this channel through Robert White's article in PELs, this is amazing!

[@sambenyaakov]

😊

[@dariuszpanek4757]

I learned so many new and useful things about Snubber. Thank you Proffesor Sam Ben Yaakow :)

[@sambenyaakov]

😊

[@movax20h]

Super useful. I am not an engineer, but the videos brings so much practical solutions and reasons why they are necessary. I was wondering, about recovering more than half of the energy. How about capturing the overvoltage using auxiliary digitally controlled switches and capacitors, instead of using diode and resistor? One would put the capacitor across the transistor (using 1 or 2 FETs), turn the main power transistor (high side for example) off, capture the energy, then disconnect the capacitor from the main power switch (using the FETs), and put it across the bus (using different 1 or 2 FETs) with a diode to discharge it back to the bus or load. Usually this would not work because the voltage on the capacitor would be kept at the same voltage as the bus, so there would be no transfer of energy, but this can be easily overcome by using two capacitors and putting them once in parallel (across the transistor), and once in series (across the bus, probably together with some diode or inductor to limit the current). The transistors used for this switching would not need to be rated high in terms of current or power, as they will only deal with switching transients. Similarly, they can be rated to the same voltage as the main power transistor, as they will not be experiencing the same kind of overshoot from the inductor, nor high di/dt, because of the effect of the capacitor on charging. I understand this might not be practical, but from purely academic perspective and higher efficiency and overvoltage protection, it is interesting to explore. It could be a kind of active lossless clamp. The main issue (beyond circuit complexity) would be that it might require quite a bit of tinkering with the timings. And the time might be depended on the current / load for optimal operation, which limits its flexibility (could probably be solved by some comparators tho).

[@sambenyaakov]

Hi, Thanks for input. Food for thought.

[@robson6285]

This lesson includes a couple of different usefull things. And is it me or did you made it more easy by pointing to some more basic things that are going on here, at least a couple of times in the first half of this video? It isnt easy but with enough efford anyone who wánts to understand cán learn and understand it totally. Because it is indeed usefull, only to understand this kind of behavior and the way the exess of power can be dissipated, this is wide usefull. So thanx from your fans in the netherlands, again, for you sharing and teaching your knowledge and insights!

[@sambenyaakov]

Thank you for interesting comments and worm words.

[@sambenyaakov]

😊

[@eduardinification]

Very interesting as usual. Thanks for your intuitive explanations. Regarding power losses, it could be interesting to compare the power losses in a MOSFET, with and without snubber, in terms of temperature rise in the junction, by using real MOSFET model provided by the manufacturer.

[@sambenyaakov]

The snubber described in video (non charging/discharging) does not effect the MOSFET losses. It just protects against high voltage peaks.

[@big-boss-404]

Awesome explanation sir. Great video 👍. I have a question, will it work in full bridge as well?

[@sambenyaakov]

Yes

[@big-boss-404]

​@@sambenyaakovThanks, Prof. I will try to implement this to overcome overshoot in my PSFB project

[@n3tpr0b3]

Dear Professor, Thanks a lot for the quite interesting presentation, and your videos in general. I have one comment for this presentation though. I see that you are refering to the output capacitance of the MOSFET as Coss. But, as per convention, Coss = Cds + Cgd, so calling the Cds capacitor as Coss, seems a bit misleading to me. I that you stay safe in these pandemic times. Cheers!

[@sambenyaakov]

Thanks

[@rinqucosta2422]

Love from Bangladesh ❤

[@sambenyaakov]

Greetings from Israel

[@hamidk4772]

Beautiful, going to school and not paying for a class. :) :) :)

[@sambenyaakov]

😊

[@DazHarkz90]

Hello Professor Ben-Yaakov. Amazing videos, thank you ever so much. Your explinations are really helping me in the final stages of my degree. Do you have this material published so I can give it the recognition it deserves within my report referencing? I can find it elsewhere, but your way of explaining it talks to me personally.

[@sambenyaakov]

Sorry, no papers that I can point to.

[@СергейЛабунский-б6ц]

Dear Professor Ben-Yaakov, excellent calculation. Thank you. But in case of bifilar coils this might have some additional assumptions. Because if inductance tends to be a 0 value, there is no need in capacitor (and resistor). I accidentally allowed an arc to appear and it killed my transistor. Have no clue about the voltage of the arc. 3000V+?

[@sambenyaakov]

There is no such thing as zero inductance.

[@dinodelfavero]

Very interesting and also very very well explained, Ben-Yaakov you are a good professor, thank you for the videos! I have a question, maybe there is the explanation in a video (in case can somebody indicate it?) what is the method to calculate the parasitic inductance Ls, of a real PCB?

[@sambenyaakov]

🙏🙂

[@danielhadjibashi4519]

Thank you for this amazing video Professor Ben-Yaakov. I have two question please. When selecting the snubber resistor value is it simply e.g. 430V/20A = 22Ω. Also the power dissipated across the resistor will it be the same as the capacitor 16W as mentioned in the video?

[@sambenyaakov]

It will be to adjust the resistor in circuit. The power is in fact dissipated in resistor not in capacitor.

[@joaquingarridozafra1587]

Thank you for these useful videos. I have a question: How can we estimate the value of Rsn once we have Csn? Thank you again!

[@sambenyaakov]

It should be small enough to discharge the cap.

[@danielhadjibashi4519]

Dear professor, can I use the same calculations as you have shown on slide 16 to estimate the snubber capacitor for a charging/discharging RCD method? Or do they only apply to the non discharging RCD snubber method?

[@sambenyaakov]

Only to non discharging

[@dinhbkvn]

Dear Prof. Ben-Yaakov, Thank you for your lecture. May I have a question? At 18:21, you show the calculation of the actual loss Energy which converts into heat Eloss = QV = Io/w*Vb At this point, I confused a little bit. Since at the steady state, the voltage across Csn should equal to Vb via the loop Vb(+) -- Rsn -- Csn -- Vb(-), the energy which dissipates on Rsn should be caused only by the voltage deviation between Vpk and Vb (i.e., Vpk - Vb). Obviously, you cannot discharge the entire energy store in the capacitor Csn. Hence, I think the right estimation of the loss should be: P = Io*(Vpk - Vb)*sqrt(Ls*Cs)*fs It makes the loss much smaller than that presented in the lecture. For the example in the Video, the snubber power will reduce from 16W to only 1.2 W, and the dissipation on Rsn is 0.6W which is a half of 1.2.That is exactly equal to the conventional estimation: 1/2*Ls*Io^2*f = Io*(Vpk-Vb)*sqrt(Ls*Cs)*f I would admit that your lectures are very interesting. And I am sorry if my understanding is wrong. I am looking forward to hearing from you. Best regards,

[@sambenyaakov]

Hi, Thanks for comment. You have not taken into account that the driving force for current flow is the inductor.

[@zil157]

Thank you very much for your presentation! Could you please make the same about suppressing EMI going from inverters? Thank you.

[@sambenyaakov]

Have you seen kzbin.info/www/bejne/a3-1mn-Fq9KLmqM

[@arpanlaha1653]

Hi Dr. Yaakov, Can you let me know what SPICE software you are using for simulations? Thanks for the informative video!

[@sambenyaakov]

Hi Arpan, I am using the free demo of PSPICE (Lite)

[@vladislavsmarda2358]

Dear Professor, I would like to ask you about stray inductance. If the transformer has some leakuge inductance, can I consider as stray inductance ? Or leakuge inductance of transformer doesnt play role in this and as stray inductance I should consider only stray inductance of PCB layout etc. ? :) Thank you for your great videos sir.

[@sambenyaakov]

Yes, the leakage is like a stray inductance, in series with the winding, not coupled to other windings. Thanks.