Input and Output - An Introduction To FPGA And CPLD - PyroEDU

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[@jakeambrose4294]

This is really cool. Obviously based on lack of comments very few people get into this stuff but that actually makes it even cooler to know its a rare knowledge and i know the value of it. What i was also getting at is i notice how the tests are similar to the arduino ones BUT this is at the even lower foundational raw lowest level which is what I'm looking to learn and some one looking to know everything from the ground up wants to learn. Bad ass guys your efforts are extremely appreciated.

[@Bambicarus]

Just a brief comment to say, that even now some 6 years after this content was uploaded, this stuff is still really appreciated. It is an excellent series, well narrated, professionally presented and engaging. I'd love to see a revival of PyroElectro.

[@fjs1111]

Hi Chris, there is no way in VHDL to declare the pins there as opposed to PIN Planner? Thanks a bunch