Realizing Half Adder using NAND Gates only

[@krithikaravichandran5706]

Sir please do the videos of digital electronics practicals which would be more helpful.. cos your explanation is very good and useful

[@srinivasummidi9858]

Your explanation is too good and helpful for all computer science students....Thank you

[@thetechrealms7824]

Wow, this was very helpful

[@entrtnmnthub5357]

Tussi grt ho sirji!!!

[@abdxlive]

Thanks Neso ♥

[@madeya3768]

After 6 years this is using for me tq so much bro I am from banglore tq

[@unnavaanurag]

very nice explaination.....helped a lot...i am gonna subscribe

[@ngstatuscollections5251]

Can't we give same input to two nand and then apply nand of the outputs. It will finally give expression like (A'.B')' and It can be written as (A')' + (B') '

[@rottenhornet9442]

Why is it called 'Realizing'?🤔

[@pranayagrawal0000]

very nicely explained..

[@lalitkashyap1203]

Mn to kr rha h college ki fees thi de dun pr abba nhi manege😂

[@mattaswami5264]

Hello sir how could u draw the circuit before simplifying the expression

[@mdf1259]

Can i get any suggestions for Online Boolean Expression calculator

[@barsilgen120]

Thanks a lot

[@tamimshikto4754]

sorry sir, i don't know why you drew the necessary gates before the expression. i myself from the expression A'B+AB' got that it's equal ((A'B)'.(AB')')' and for that i needed 5 nand gates...should i memorize the circuit and then find the expression from that????

[@kshitijvengurlekar4412]

Watch the previous lecture in which he implemented EXOR gate using NAND gates

[@kajalkumari1192]

Simply the best

[@sephyrion9207]

what the symbol for the XNOR expression shown at 4:21???

[@abdullahiji8642]

who else thought of applying to intel or AMD after watching all the digital electronics play list :)

[@hamzah4792]

hahahahaha i have that feeling bro may Allah see us through this journey

[@deepdyotakdash7422]

@@hamzah4792 bhai log abhi kya kar rahe aap sab

[@Otaku-eq2rc]

Sir, half adder can be implemented using XOR gate and AND gates, so why is there a need for NAND gate, if we already have XOR and AND gates?

[@daxalakdawala427]

JUST TO DECREASE THE NUMBER OF GATES FOR IMPLEMENTING HALF ADDER WE USE NAND INSTEAD OF XOR AND "AND" .

[@mdf1259]

I know distributive law But I can't understand this exprseion [(A'+A.B)(B'+A.B)]' Change to (A'B'+A.B)' Could anyone help to solve this?

[@vamshishette4148]

distributive law(A'+AB=A+B) [(A'+B)(B'+A)]' A'B' +A'A +BB' + BA (A'B' + AB)'

[@it-a-024-ibrahimfarwahaffa2]

@@vamshishette4148 tnhks

[@code-to-design]

link to previous video plz

[@Pranalibhogwal]

I didn't get it😢

[@SaikatPodder]

can we do it in different way?.at first draw sum and carry with AND OR then just replace this gate with NAND gate..check the ansr is same..reply me

[@sanjaypareek9486]

I think usse nhi ho payega

[@nayankarmakarofficial6294]

@@sanjaypareek9486 it will be...but there will huge amount of nand gate...that will very uncomputable

[@sushantpandey897]

@@sanjaypareek9486 kyun nhi hoga? You're replacing gates with their nand equivalent

[@sharmisthabiswas7468]

lovely

[@064khwabkalra5]

at 4:30 the expression (AB + A'B')' would always give zero according to complement law ( if we consider AB as q then A'B' is q' and we know that (q+q' =1)) isn't this going wrong?? please help

[@nesoacademy]

Your assumption is wrong. If AB = q, then A'B' ≠ q'. But, q' = A'+B'.

[@ANUJKUMAR-ys6dy]

Yes, if q=AB then q'=(AB)'=(A'+B')

[@avisinha2543]

Sir ji This is wrong process. This is diagram of XOR gate by NAND gate only.

[@gaweyn]

means you did not finish watching the video. after 4:45 it is about the Carry

[@himelsarkar137]

"100Thanks"

[@vishalsingh-de6pj]

jhakasss explained

[@SaikatPodder]

Sir help me

[@yagzyalcntas553]

ok

[@INT_MAX]

POO IN LOO