RFPro-24: Simplifying Multilayer EM Simulations with RFPro

[@HugePlays]

Hello, if you have an existing PWB design that has a lot of ground vias for stitching layers together, is there a way to automatically reduce the amount of vias used during an EM simulation or does one have to manually delete the vias in the layout that they do not want to simulate in order to speed up simulation. Is there an easy way to simplify the ground vias for an EM and reduce simulation time/resources automatically or does one just have to manually delete extra vias. Thanks for all the video, 10/10 and shared with many!

[@BhargavaAnurag]

Hi, Thanks for your comments. You don't need to do anything manually, when you use Gen2 meshers (for Momentum & FEM) in RFPro it does all simplifications necessary behind the scene...😊 If you are using legacy emSetup then you can do things manually which is little involved but it is possible to simplify it up to a great extent.

[@nusermane1076]

Thank you for all these great videos!!! As a complete beginner with RF design tools I have a question: I am designing a passive transponder, consisting of a substrate with a bottom cover-sheet and a top layer. On the top layer there are two patch antennas, matched each to 50 ohms by an inset feeder, the feeders ends face each other, such that one antenna is oriented to the right, the other to the left hand side. In between a diode has to be placed as a nonlinear element. I don’t understand, how I determine the diodes characteristic impedance and how I do the matching, as well as the simulation in ADS. Especially the placement of the ports for the simulation isn’t clear to me, since the transponder is not supposed to be connected to anything … Do you have any ideas for me? Thank you for your time, best regards!!!

[@BhargavaAnurag]

I will not have opportunity to answer your question here as it is too complex to answer using just the "text". This video will be of some help: kzbin.info/www/bejne/pJ_JioyOlsyrpMU and more support kindly contact Keysight tech support team in your region.

[@nusermane1076]

@@BhargavaAnurag Thanks a lot, I will do so!!!

[@rewaamaher3400]

Thank you for your helping videos Can you please make a video about how to use SDD2P in ADS by an example?

[@BhargavaAnurag]

You can refer to the SDD example available under the ADS examples folder...If there is still some confusion then reach out to Keysight tech support team for help

[@李云-o8r]

Teacher, I would like to ask ads if there is any way to model parameterized like hfss. For example, (x1，y1) and (x2，y2) to determine a rectangle. The modeling method of ads is too complicated to adjust. Or can hfss call ads's simulation algorithm? hfss runs too slowly.

[@BhargavaAnurag]

Hi, It may look hard in the beginning but I can assure you, its not that bad and there are many tricks, e.g. if you want to draw rectangle with specific length and width, don't use the normal rectangle and instead use Microstrip line i.e. MLIN. This component is already parameterized so you can create any rectangle with known width/length and then parameterize it very easily, even much easier than how do you in other tools like HFSS. Kindly contact your local Keysight tech support for quick help and assistance to learn all the tricks. HFSS cannot call ADS simulators as of now.

[@李云-o8r]

@@BhargavaAnurag However, compared with hfss,ADS, it is still difficult to parameterize and adjust the structure at will. Can the teacher give several more tutorials on layout modeling and parametric optimization? I have read all your tutorials before, and I want to learn more modeling skills kzbin.info/www/bejne/aqm1YamohNtqa7s&ab_channel=AnuragBhargava

[@BhargavaAnurag]

@@李云-o8r Kindly contact your local Keysight tech support and they can teach you plenty of tricks...👍

[@abhijithas9976]

Sir please upload a video on LSSP and how to plot on rectifier.

[@brothers6196]

hello anurag..my question is related to PA, i have design 45watt PA from 4.5 to 5 GHz using cgh40045f cree devices(0 to 4 Ghz).i use it above its inherit frequency. In layout simulation it gives 11 db power gain but after fabication it gives 7 to 6 db small signal gain i change the design with differeant tapology but result was same can you please tell me the possible reason..???

[@BhargavaAnurag]

I am not sure if I can pin point the issue without seeing the design and what all sims were performed but below points are for your considerations: 1. If the device is supposed to be used till 4GHz as per datasheet then it wasn't a smart decision to use it for 4.5-5GHz range as the device model can't be trusted and vendor won't do much validation beyond recommended frequency in datasheet and this could be cause of gain mismatch as non-linear model can't be trusted. 2. I am not sure how you did measurement as no VNA will be rated to handle 45watts power so I assume you must have used a pre-amp and a high power attenuator at the actual PA output. Have you accounted the same in your VNA calibration? 3. Anything more than this will require a careful design review which I am not in position to do...😊

[@brothers6196]

yes ..i accounted all practical precautions before connecting it to spectrum analyzer...btw thanks for your reply ... Appreciated..

[@徐俊-c1u]

Where to get the PDF in your video

[@BhargavaAnurag]

Which PDF?

[@徐俊-c1u]

ow to get the PDF in your video

[@BhargavaAnurag]

not sure which PDF are you referring to? I didn't use any PDF in this video.