SRAM 6T - write operation and design consideration

[@ShrenikJain]

Shrenik Jain - Study Simplified (App): play.google.com/store/apps/details?id=co.kevin.nxpgd

[@grasheed401]

Please explain how to make Q=0 and Qbar=1 (initially) before WRITE 1 operation in the simulation environment.

[@Skovorodnikof]

You've made complicated to extremely simple dude. I can't thank you more. Also, I loved your teaching that you use your hands to touch and point the stuff you're explaining which I do when I learn stuff myself. Keep up the good work mate!

[@ShrenikJain]

Skovorodnikof Ty for appreciating the efforts😃.. Do share with your friends too 😇😃

[@Skovorodnikof]

Wow that was quick response, lol. I'll share w friends who'll need this content :)

[@ShrenikJain]

Skovorodnikof 😇

[@Skovorodnikof]

By the way is there a way to build SRAM using Pseudo-Nmos'?

[@nafitulbhuiyan6595]

This video as well as the video before (read operation) explains the function of this 6T SRAM very well. This is a great refresher! Thank you

[@ammarahassan5082]

U hv got such a nice skill to teach.... Its superb 👍

[@jazzkumar3154]

Thank you so much sir even after studying mathematics from you for gate, now you're videos are helping even in my MTech

[@neerajsahu4254]

Dude Ram is one of the the complex topic, you made it easy! :)

[@srilikhithalattupally5832]

thank you so much, you made basics clear in easy language

[@ShrenikJain]

+srilikhitha lattupally Welcome 😃 Do share with your friends too 🙂

[@srilikhithalattupally5832]

sure actually i made presentation in our class what ever i understand from ur lecture and seriously it went very well thank you

[@ShrenikJain]

srilikhitha lattupally Welcome 😃

[@enricoclochiatti7383]

very good explanation in no time! thanks a lot!!

[@AdityaSingh-yb4vu]

Nice video man simple yet very well explained

[@saayonsen3131]

Very well explained bro...

[@ShrenikJain]

Ty 😄😊

[@bnitinbhaveshsrivastava5969]

Beautifully explained..

[@sdssfilms9040]

keep uploading videos...your concept are clear....superb sir...hats off

[@mdshadabahmed6104]

Thnks for making my concept absolutely clear👌

[@chandanads292]

You could have completed the design..... Though good explanation Pls upload complete video

[@auroshisray9140]

Thank you for making it simple

[@myteacherji]

when M4 is on Q' should be 1 why it should be 0 ??

[@souravbanerjee4567]

Because M4 is connected to Gnd and M3 is off which means switch is open n so Q' can't be equal to Vdd or 1.

[@ramilawijesuriya7259]

Great video !!

[@uday5786]

in designing,read operation when capacitor discharges at left side..how q can be increased??

[@anushapemmanaboidi3579]

Thank you sir 🫡💯

[@tejomanasa]

If Q=1 ,then Q discharges again through bit line , and Q' becomes 1 again and so on . Can you explain how the time for which the Word line should be kept on ,so that the recurrence doesn't occur.

[@agarawal100]

Thanks dude..well explained!!

[@ShrenikJain]

Utkarsh agarwal Welcome 😃 Share with your friends as well 😊

[@srinivasan7790]

i dont understand write operation fully since when do we make the bit line compliment to gnd and what if we need other case. it would be better if u explain both the cases

[@souravbanerjee4567]

For the other case u mean when Q=1 but that's not true since Q must be equal to 0 so that write operation is performed on the memory.

[@vinayanpa126]

So how to write 0 without creating the race condition

[@ratnagreeshma5190]

nice explanation

[@vincentm99]

this was an extremely good video, thanks you !

[@ShrenikJain]

Welcome

[@souravbanerjee4567]

In the second case when Q=0,and discharging happens then why voltage increases,it should decrease across M4 just like the previous case? Can u explain it please.

[@saylee1207]

It is because the access transistor that is ON is trying to pull the node Q up by driving current into it. So to maintain the state they make the NMOS M2 relatively stronger than the access transistor M5. This constraint is read stability.

[@skilz9525]

@@saylee1207 okay he should have explained this in the video but koi na thanks

[@vennapriyanka1547]

plz give explanation on design of a low power 10T SRAM cell

[@maheshks3539]

very good and simple explanation

[@ShrenikJain]

+mahesh k Thanks 😃 Share with your friends as well 😊

[@jayeshprajapati2905]

very well explained.

[@ShrenikJain]

+Jayesh Prajapati Thanks man 😃 Share with your friends too and let us help everyone 😊😊

[@jayeshprajapati2905]

Shrenik Jain for sure.

[@sdssfilms9040]

hello...i hv to know the working of sram in detail...kindly do a favour for me...please share a video or share a link dat somehow i read it from.....as i am making a project on optimisation and analysis of sram parameters.....

[@naveenkumararva1892]

Nice

[@shashankshekhar2736]

Very good bro

[@ShrenikJain]

😎😇

[@yazanattar9074]

legend

[@yahavx]

damn this accent

[@shoaaamir2110]

Nice