Simulating VDHL code with GHDL

Demonstration of using GHDL to simulate VHDL code, and using GtkWave to view the resulting waveforms.

[@marciomaiajr]

Just found your channel. Awesome content. Theres not much stuff about GHDL on the Internet.

[@SandwichMitGurke]

very helpful, thanks

[@user-ww2lc1yo9c]

So its not possible to add breakpoint into code when using teh GHDL, is this correct?

[@SandwichMitGurke]

when i run the Makefile, i get this warning: instance "dut" of component "sevenseg" is not bound [-Wbinding] Do you have a sevenseg file in that folder or have you compiled a sevenseg entity before running this?

[@botsnlinux]

Yes, this assumes that there's a file `sevenseg.vhd` which has to be analyzed/included in the design (I add it to the Makefile around 6:25)

[@stephanbokelmann507]

Where does the file sevenseg.vhd come from.... am I missing somethin?

[@botsnlinux]

I'm assuming that it's a VHDL module in a separate file that's already been created -- in my course most students have already built this for their lab project before they start simulating stuff. Any module with a matching entity declaration will work with this example testbench.