STET 2019 | FLIP FLOP IMPORTANT MCQ | PGT CS | BY GAURAV SIR

[@sandeepkumarg1889]

27/30 I am a 1st-year student of BE-CSE, good question collection thanks sir

[@sitrajeet]

17. No question Ko sir ek Baar fir se dekhiye,kyo ki latch or flip flop dono me 2 input hota hai,latch level trigger hota hai(asynchronous),or isme clock signal nhi hota hai Janki flip-flop me extra circuit 2 nand gate use hota hai clock k liye-

[@samirsaini783]

Ye bro you r right latch aur flip flop me two input but latch me one output aur flip flop me two output

[@samirsaini783]

17 me ans ye hona chahiye latch has one output but flip flop is a two output

[@hrukvlogs3350]

Basic से भी krvado एक video me flip flop

[@TEACHEXTRA]

ho chuka hai mam

[@sheetalredekar4474]

🙏🙏🙏 thankyou sir

[@resurose3237]

Thanks

[@gulabchandgupta5486]

Tysm sir ❤️❤️❤️

[@Raja_ji55]

merit list sirf jitna vacancy hai utna ka hi niklega kya ya cutoff pe niklega

[@resurose3237]

Cut off p niklega results

[@Raja_ji55]

@@resurose3237 kuch log bol rahe hai ki jitna seats hai utna ka hi merit list taiyar hokar niklega.....Oise cutoff pe niklega to achha hai hamlogo ke liye

[@resurose3237]

Ab is baar kanhi hoga aisa,

[@samirsaini783]

Latch me one input galt diya hai

[@AnjaniSingh0707]

18

[@mdajazahmad5055]

16/29