Synchronous Counter (Part 2) | Synchronous BCD Counter

In this video, the basic design procedure of a synchronous counter which counts in a specific sequence is explained with the help of two examples. And during the design, how to check and eliminate the lockout condition is also explained.
The following topics are covered in the video:
0:00 Introduction
1:18 Example 1 (Synchronous BCD Counter)
18:50 Example 2
Other useful videos on Counters:
1) Synchronous Counter (Part-1):
• Synchronous Counters E...
2) Limitations of Ripple Counter:
• Effect of Propagation ...
3) Asynchronous Counters:
• Asynchronous Counters ...
4) Asynchronous BCD Counter:
• BCD Ripple Counter (wi...
The general procedure for designing a synchronous counter
Step 1: Find the required number of Flip-Flops
Step 2: Draw a State Diagram
Step 3: Select the Type of Flip-Flop and Draw the Excitation Table of the Counter
Step 4: Find the minimal expression for each Flip-Flop input
Step 5: Draw the Circut Diagram
Step 6: Check for Lockout condition
Step 7: If a lock-out condition is found then modify the designed circuit
This video explains this design procedure with the help of two examples.
In the first example, the synchronous BCD counter is designed. And in the second example the counter which counts in a sequence 0,3,5,6,0,... is designed.
This video will be helpful to all the students of science and engineering in understanding the Design procedure of Synchronous Counters which can count in a specific sequence.
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Music Credit: www.bensound.com

[@Karthikboni1107]

Super explanation bro 👌👌

[@swathi9086]

Highly talented teacher

[@EgeCalsma-uj5xt]

Very clear explanations

[@aryansudan2239]

amazing explanation

[@mayurshah9131]

JUST SUPERB

[@poojashah6183]

👌🏻👌🏻👍🏻

[@user-ol7fq8ke8m]

How can i download pdf

[@gopikrishnanm8091]

🤙👍

[@N0dumb]

These are very complex things for the brain 🤓

[@alexport8098]

Ya🙈

[@sofiyasekhar]

sir how to decide which flipflop to be selected

[@ALLABOUTELECTRONICS]

As such there is no specific rule. You can design it using any flip-flop. Accordingly, your connections and external logic circuit will change.

[@user-mm4mm3ib2w]

mod 10 counter Can't it be designed directly by using nand gate 1001 to clr input to set it 0000 again

[@ALLABOUTELECTRONICS]

What you are saying is typically done in the asynchronous or ripple counters. I have already explained that. You can check this video. kzbin.info/www/bejne/haeyiYWHnretl9Usi=f8CkHz37VGf1KY1_

[@user-mm4mm3ib2w]

@@ALLABOUTELECTRONICS it cannot be done here?

[@ALLABOUTELECTRONICS]

@@user-mm4mm3ib2w Here also, if you want to do then you can do that. First, you need to design 4 bit synchronous up counter and then you need to give Q3 and Q1 outputs to NAND gate (as soon as the output goes to 1010, clear input will be generated), and the output of the NAND gate should be connected to clear input (assuming it is active low). In this case, the issue is that, momentarily, the output will go to 1010 state and then it will become 0. So, momentarily, there will be a glitch in the output. And as a designer, one should avoid that.

[@user-mm4mm3ib2w]

@@ALLABOUTELECTRONICS Thank you sir for solving my doubt.

[@gopikrishnanm5310]

Sir still how many videos are left in counters?

[@ALLABOUTELECTRONICS]

The videos related to counters have been covered. But few questions related to it will be covered on the second channel and it will be updated in sequential circuits and digital electronics playlist.

[@gopikrishnanm5310]

@@ALLABOUTELECTRONICS thanks sir.

[@mehraan3668]

With all due respect sir, the music at the start of the video is not pleasant at all. Please consider removing it or opting for a shorter and more subtle intro. The lectures are superb and of great help.🙂