COA | Instructions in Computer Architecture -2 | Lec 6 | GATE Computer Science/IT Engineering Exam

[@SecretEscapist]

Sir, your teaching style is very attractive and easy Start Time: 8:00 Ans of the Practice Question 4 is 500 Bytes

[@rajatyadav4077]

These questions opened the new way of thinking, loved it

[@SecretEscapist]

Yes, correct

[@varun_immadisetti]

This lecture is awesome sir. Thank you 😊

[@unpluggedfemalecover3081]

amazing teaching style!! please keep going sir, though i was not able to attend the live classes, it seems live class is going on!! now i will attend the live class every time. thank you sir please keep teaching us!!

[@jaysurya1190]

gajab majja aaya ek damm dhashu concept great sir ........

[@ayushs7766]

Awesome ...love you sir !!

[@abhishekborse8057]

Lecture starts at 8:02

[@RaushanKumar-gt9ly]

Finally I completed 👍👍👍 thanku sir

[@ball_live]

Awsm Content

[@anubhavrai5427]

cs 8:00

[@aditya-bl5xh]

Bhai tune bhut help ki hai, tera comment pin hona chaiye

[@anubhavrai5427]

@@aditya-bl5xh Thanks Aditya for Your great Appreciation.

[@harshthakur9890]

Thanks bro

[@iqbalhussain422]

in last question(512 instruction wala) practically it is imposssible to implement it bcoz, first six bit are treated as opcodes for 3 address ins. . So, there is no combination left which will help cpu to transit to opcodes of 2 address instruction... Means that every every every instruction will be treated as 3 address inst..

[@ashishlalwaney4838]

19:58 Buddy says,"I will have to" 5 times :p

[@vikramadityamishra7189]

2^5 =32 instructions

[@PrithaMajumder]

@@vikramadityamishra7189 😂😂😂😂😂

[@shresthkaushal8634]

@@PrithaMajumder 😂😂

[@SecretEscapist]

@@vikramadityamishra7189 Very funny, 😂😂😂

[@kalvaadibabu9147]

Your hero sir

[@praveenjha802]

awesome lecture

[@computingpanda1629]

great teaching

[@LegitGamer2345]

nice explanation!!

[@misstopper1]

Thank You

[@heikhamkorounganba7865]

Amazing sir

[@kuchimanchisireesha3273]

can a 4 address instruction store a value in the last address rather than address of the next instruction?

[@RORAVIKUMART]

i think noo

[@growwithsomangshu1463]

Q4 Answer is 500 bytes , Not 425, as due to byte alignment we can store the last 2 bits without wasting the remaining part of the byte space

[@vaibhavgupta973]

completed sir , thank you sir !

[@kshitijjain6071]

in practice question 4 sir how size of instruction 12 bits converted to 4 bits opcode in previous question we have converted no. of instuction to opcode bits?

[@suyashrahatekar4964]

Couldn't fully understand u , but I would tell that 12 bits is the size of instruction set , ie, how many distinct instructions are there. 12 bits isn't the size of one instruction.

[@kumarakash5219]

In last question why we equate it with 512

[@AS-we3zt]

Thank you sir ji

[@divyapriya2302]

Where can i find notes of the lectures sir

[@ydayanandareddy7283]

Telegram pe

[@RaushanKumar-gt9ly]

Sir, answer for Q-5(HW) is 5bytes???? Tell me sir please if wrong than what is the answer??

[@amishss2352]

Kaise 5 ????

[@aksharaviju6624]

1 instruction requires 5 bytes which I also got, but they have asked for 100 instructions, therefore final ans would be 5*100=500 right?

[@amishss2352]

@@aksharaviju6624 5 bytes kaise aa rha hn yrr ,Mera 42byte aa rha hn😔😑

[@aksharaviju6624]

@@amishss2352 patha nahi right hai kya.. peheli baar tho

[@amishss2352]

@@aksharaviju6624 ap bTao toh Aaya kaise 5 byte ???....

[@animeshlohar5395]

Sir Can you provide TOC lectures free for us?

[@bhaskarchakraborty8328]

Sir in first multiple instructions question Used will 3^2 not 2^2

[@pradiptanandi2580]

Why is the video cut in between? Too many jumpcuts, hard to follow

[@rajattiwari6697]

Q4. No of reg=64=2^4=6 bits No of Instructions=24=4 bis opcode 1.Size of Opcode =4 bits 2.Size of Reg 1=6 bits 3.Size of Reg 2 =6 bits 4.Size of Destination Reg Identifier =6 bits 5.Size of Immediate Indentifier =12 bits ADDING them (4+6+6+6+12), we get 34 bits See in the question they are asking in bytes,so 34/8=4.25 =5 bits SO for 100 instructions, 5*100=500 If any mistake ,then let me know

[@ajinkyaauti2463]

why ciel used for bytes calculations?

[@pavanroyal8183]

How op code becomes 4 bits it's 5 right?

[@ravikeshpatelgk8336]

yes 34

[@Himahdjejdbddu-fg9hi]

No of instruction is 12 not 24 According to question

[@iqbalhussain422]

Again, log(512)= 9 So 14-9= 5 bits are used for combination of 3 address instructions. So 32

[@ravikeshpatelgk8336]

q4 425 bytes

[@amishss2352]

Q4 -- 4200 byte consumed ....plz reply me is it correct or not ?

[@bhaskarbhasku2921]

6 bits registers, 4 bits for instructions, 12 for immediate so total 34 bits 34/8=4.25 bytes so there is no decimal in system so round off to 4 or 5 if 4 is taken 400 if 5 is taken 500.

[@mozart8782]

@@bhaskarbhasku2921 correct

[@navya_charitha1]

@@bhaskarbhasku2921 Why to round off??? 34*100/8 = 425 Bytes... Is not this correct??

[@ShubhamPatil-bv6mk]

@@navya_charitha1 4.25 bytes is correct but we are said to store the inst in byte addressable form so each cell will take 1 byte of inst so for 4.25 bytes we will need 5 cells .......which means to store a single inst we require 5 cells so for 100 such inst we need 100*5=500

[@Psaha0000]

@@navya_charitha1 yes it's correct

[@fortamils]

Hi,day-2

[@menokahalder8267]

Anyone please help me to understand practice question no. 3

[@rstudio2879]

40 distinct instruction ------ log[2] 40 = 6 bits are needed for the opcode. 24 general purpose registers -----log[2] 24 = 5 bits for register operand. Take note that log[2] 40 means= 2x2x2x2x2x2 , we multiply 2 six times by itself, to get the 64 bits. Meaning, 64 bits is enough to handle 40 distinct instruction. Unlike 2x2x2x2x2 , we tried to use 5 bits than 6 bits, we will have 32 bits. Meaning 32 bits can't handle 40 distinct instruction. So that, from the example on this video, 40 distinct instruction = 6 bits (meaning 2 six times multiply by itself) in order to handle the 40 distinct instruction. This process can be applied to find the register operand, where the given is 24 general purpose registers = 5 bits. As the two register operands are required so, total 10 bits are needed for register operand field. That's why we add 5 bits + 5 bits to get the 10 bits. We will add: opcode + Register Operand + Immediate Operand =32. (Since the given is 32 in the question). As we already have the value for Opcode which is = 6, and register operand = 10 bits, we need more bits to reach the value of 32 bits. That is why the answer for question 3 is 16 bits.

[@PandeyJii9632]

Last question answer is 62.

[@chandrabhachatterjee2472]

how 101011 come

[@pavanroyal8183]

I think he takes like an example

[@AmanSingh-dy4pp]

at last question x will be 64

[@deedhitidingal3854]

Q4. No. Of instructions is 100. Opcode bits is 7. No.of register is 64 Register numbering I'd 7 and immediate value is 100-28=72. Is it correct?? Anyone verify it

[@shubhamyadav-qg3np]

sir watching your videos now is answer to practice question (4) 3800(4+6+6+6+12)*100.

[@shubhamyadav-qg3np]

3800 in bits 475 in bytes

[@takshpatel8109]

Thank you sir