Using the FPGA I/O of a NI myRIO with VeriStand

[@tiwar87]

Thank you so much, it has been very helpful. I have LabVIEW 2019 (32bits) and have installed VeriStand 2019 but when i open LabVIEW projects I cant find the template of VeriStand in LabVIEW. My main goal is try to fix this problem, test it and then try to deploy a Simulink Model in myRIO and map the inputs through VeriStand (HIL Test of a PV Solar Panel), but i dont have idea where to start, maybe can you give us some advice and how to solve the problem mentioned? Thanks

[@harotek2207]

I am not sure what your problem is. Are you trying to create a FPGA Configuration files for VeriStand? If that's the case, for the VeriStand Template to appear in LabVIEW, you must install the file provided at the end of the original post of : forums.ni.com/t5/NI-Labs-Toolkits/NI-VeriStand-FPGA-Based-I-O-Interface-Tools/ta-p/3493285?profile.language=en

[@tiwar87]

@@harotek2207 Thank you so much, that was exactly what I was need it in this first stage! the second part is try to use a Simulink Code of a PV Panel and download it to myRIO (Convert in C code and deploy in myRio, HIL Test). It will be programmed through VeriStand. I sincerly appreciate your help. When i finish my project i share the process with the community. Keep Going forward.

[@Jackth3Gamer]

thank you goooood video homie