Z80 Retro #3 - How the CPU Controls Everything

[@svensvensson5880]

About the address bus during IORQ: If you use a command where the port number is in the C register the upper half of the address bus will contain the value in the B register. So you can have a 65536 ports instead of just 255 if you decode all of them. During the other I/O commands the contents of the A register will be put on the upper half of the address bus instead.

[@JohnsBasement]

Indeed! While it isn't necessary for the retro board's few ports, it could be useful on plugin boards.

[@markevans2294]

On page 75 of the manual it states: "In the IN A and OUT n, A instructions, the I/O device’s n address appears in the lower half of the address bus (A7-A0), while the Accumulator content is transferred in the upper half of the address bus. In all Register Indirect input output instructions, including block I/O transfers, the contents of the C Register are transferred to the lower half of the address bus (device address) while the contents of Register B are transferred to the upper half of the address bus." What isn't made clear is that the IN block transfer instructions alter the B register after the I/O cycle the OUT versions do so before.

[@stevewonder9431]

This is gold omg doing some z80 applications in school project you can’t imagine how bad they teach us the way cpu run and stuff

[@JohnsBasement]

😂 I'm glad I could help!

[@MarkovAllTrades]

Haven’t read the other comments, but just a correction and a thankful (for my matrix keyboard) addition to the way the Z80 works the address bus on a particular OUT or IN command. It does indeed write data to the WHOLE address bus, butting the contents of the B register onto the high 8 bits, to the port numbered in register C. Apparently the ZX Spectrum made use of this command for its keyboard reading.

[@carneeki]

I'm loving this series John! I'm reading the same documents you're reading just a few days ahead, but then you go over it and it helps me understand it better. Thanks!

[@gregorymccoy6797]

Making my own board. This is gold. I was not solid on the port I/O address space. You cleared that up.

[@JohnsBasement]

Cool! Are you using the retro board or did you create a new custom board?

[@gregorymccoy6797]

@@JohnsBasement I am breadboarding mine to start. It's my own minimal spin on things. Its not complete, I have to find some latches to gauge signs of life. Might do a parallel/serial stream into an Arduino connected to serial to debug. I only wired the CPU, ram, rom, and address decode the night before. Early days 😀. But I am quite happy doing it. I got a zif socket for the rom, as I know that's going to be in flux for quite a while. Look forward to watching the rest of your series.

[@JohnsBasement]

@@gregorymccoy6797 This is great! Let us know how it goes! Here is a tip that I use with Z80 CPUs (and others where it is convenient to do so) when I bring them up from scratch the first time (not sure if I mentioned this in this series or not.) Put a set of pullup resistors on the data bus. (You might have to wire them into two groups depending on the opcode for a NOP instruction.) Since the Z80 uses 0x00 for the NOP instruction, you can power up a bare Z80 with the data bus pulled DOWN instead of UP (don't short it to ground... PULL it to ground.) If the CPU uses some other code for NOP, then pull the data bits up and down to match the opcode. (when done with this part of your project, just pull then all up as would be the typical case.) This way it will free-run, executing NOP instructions. You can then look at the address bus and see it simply counting. AND you can watch things like the write, halt, mreq, ioreq, and read lines to see if they are all doing what you'd expect if the CPU is doing nothing other than continuously executing NOPs. The value of this is that it lets you power it up and see proof of life before you have to sire up the RAM, ROM, and any decode logic etc. I debugged my design of the S-100 boards I showed at the beginning of this series with nothing other than an analog VOM and two LEDs connected to the outputs of a 74LS112 () strapped to toggle on every clock and some reasoning like this to confirm that it was doing what it should each step along the way... and without having to buy any expensive equipment! The VOM can easily show 1 vs 0. But to know if something is toggling over time (like at a rate faster than 2 HZ or so) you need something that can indicate that situation. If you pull both the J and K inputs to a 1 (and strap it so the SET, CLEAR, etc. are all disabled) then connect the CLK input to any signal you want to 'watch' then every time there is a falling edge, the two LEDs on the outputs (Q and /Q) will 'flip.' If only one is on, then the signal is not changing. If both appear to be on then the signal is changing fast. If it flips slowly (like a railroad crossing gate) then the signal is changing at a period equal to the rate of it flipping back and forth. A similar effect can be seen by connecting LEDs to all the output bits of, say, a 4-bit counter whose count input is connected to the signal to watch.

[@gregorymccoy6797]

@@JohnsBasement yes, the device does work. I made a minimal test just as you described and fed in a 5Hz clock from a signal generator. The address bus incremented as expected. I probed the M1 line, too. I hope to have more results after this weekend. If I can add two numbers, I know I can move full steam on a proper monitor.

[@stefans2143]

Thank you so much! Awesome project, should be done in every computer science class :)

[@JohnsBasement]

Glad to hear you are enjoying it!

[@JohnsBasement]

@Bob Perrin They have a curriculum committee that evaluates and revises things from time to time. It, of course, is confined by the structure of the University and its mission etc. The task is to convince the institution that it fits within the mission of the University & department that will offer it, its cost is within budget, students will actually take it,... I've been through it before. It helps a LOT if a prospective employer funds the process! Who knows? Lets see where the playlist for this series goes. This is a hobby. So I'm just making it up as I go.

[@YoutubeBorkedMyOldHandle_why]

Thank you for this amazing video series John. The detail of your explanations is very refreshing. I'm sure we will all learn a LOT. Best wishes for 2022 and beyond.

[@JohnsBasement]

Hey! Thank you for such kind words!

[@PeetHobby]

Thanks John, just what I needed to refresh my Z80 knowledge. 👍

[@JohnsBasement]

Glad I could help!

[@allenlorenz]

Nice Job. Yes inconsistency in manuals are about as bad as outright errors.

[@JohnsBasement]

Wait till I get a chance to rant about the MCP23017 datasheet. :-( Spoiler alert: The /RESET pin is labeled wrong.

[@Torshak0]

​@@JohnsBasement I think it was Microchip that had sveral microcontrollers with erratas longer than their datasheets. :)

[@JohnsBasement]

@@Torshak0 I don't mind errata. My glass house is full of cracks too. All I ask is that they do a better job at updating their datasheets. I can't even find a link to report the problem. Call their main 800 number?

[@mnavarrotube]

Great video. Thank you very much

[@JohnsBasement]

You are most welcome!

[@randallrouth9029]

At time 42:14 you note that the M1 is low and IORQ is low, "... it is not fetching and instruction from an I/O device". But isn't it? In Mode 0, the 8080 legacy mode, it is fetching a one byte instruction, usually a "Restart" instruction. (Good for restarting after a HALT). And just like any instruction fetch (M1), it is followed by a DRAM refresh. Therefore, it makes sense that the M1 is low during and "instruction fetch".

[@JohnsBasement]

Ohhh!!! Yes! Good catch! ...overlooked by e due to the fact that when using Zilog peripherals one tends to run in mode 2... during which the CPU definitely does NOT receive an insn opcode from the device. However, if one uses mode 0 then, definitely, the byte would be treated as an opcode!

[@randallrouth9029]

@@JohnsBasement I am very grateful the the RD does not go low when reading the interrupt vector value. Can you imagine the complexity of the logic circuits to separate IRQ responses from I/O read requests?

[@JohnsBasement]

@@randallrouth9029 Oh geez!!! Yeah. That would be craziness!!!! The good news is that the Z80 designers made it fairly easy to be able to decode everything that is needed to decode the addressing and enable logic for the I/O devices (and the same again for memory chips) with nothing more than a 74LS138. It is a simple and clean interface! :-)

[@EdwinNoorlander]

sounds nice. am in.

[@heinzergrinder1901]

Hello... Is there anyways to play with this board in assembly language?

[@JohnsBasement]

Indeed! I have been running code on it from 'z80asm' I also hope to take a swing at running C programs on it compiled with sdcc at some point.

[@javiermitchell7073]

Hi John, just started looking be at this project. A quick question ( probably answered before). I can only source the z80 at 10mhz, the CTC and sio are slower, should I slow the main clock, say to 8mhz, so all chips can cope? Would this affect others parts of the project?. Thanks

[@JohnsBasement]

I'm sorry. I thought I replied to this. I must have not hit 'send'... I had the same problem sourcing parts back in '21. Nothing on the retro has a "minimum speed". And the Z80 also has no minimum speed. I picked up a few oscillators back then so I was ready for anything. Run it at 8mhz and it will be fine. I haven't posted much code for the ctc yet. You will, obviously, have to consider the oscillator speed on anything that uses the system clock as a timebase. Note: I use the second oscillator for the SIO bit rates in my BIOS. So make sure you get the same speed for that oscillator!

[@javiermitchell7073]

@@JohnsBasement thanks John, I was pretty sure it could run at slower speeds, but wasn't sure some chips- ie: CTC - would have trouble with the clock speed. Later I realized the baud speed is setup as multiple of the 1.832mhz clock, so should be alright. Anyway I already bought the chips, so what is worse that can happen! Should be fun!

[@alancabrera7116]

Nice! Honestly, I was hoping for an S100 board…. :)

[@JohnsBasement]

And honestly, I too have given that a thought or two as well. Maybe in a future project?

[@AClockWorkKelly1]

The amstrad CPC and the Spectrum both make use of the higher half of the memory bus during Io Really bizarrly when you do Out c, HL The contents of b are on the top end of the address bus ... And on the speccy and the CPC ThAt .. and not the value in c is the address used to select an output device Crazy eh!! I have no idea why the engineers did that

[@JohnsBasement]

I never knew this was a 'feature' back in 1981. I have yet to look closely at how the high address bits are used on those systems. I suspect it is a time-saver since you can output 1 byte and read one back at the same time. Someone mentioned the CPC scans their keyboard using this feature... one way to do it might be to just run the high address bits to the keyboard's Y-axis (so to speak) and then read back the X-axis to see if any keys are down on a given row. [This would likely emit a huge amount of RF unless you used, say, a transparent latch on the address lines to keep the scan bits quiet when not reading the row(s).] 🤔This is probably worth a project video at some point.

[@AClockWorkKelly1]

@@JohnsBasement oh please do make one. I cannot say how much I'm enjoying your video series so far. Very glad I stumbled upon it. I like your style man!

[@JohnsBasement]

@@AClockWorkKelly1 I'll add it to my TODO list. That is actually two topics: 1) keyboard scanning and N-key rollover, 2) how the Z80 uses A8-A15 during I/O instructions. Just a glance now, I can see that the Sinclair used EXACTLY the scheme I describe above... RF noise and all! .... AND they didn't include any diodes, so they don't have key-rollover. 😂

[@johnw68]

Interested in building a system...are bare PCB"s available for purchase ?

[@JohnsBasement]

Yes. You have two options. #1) You can order some from China. You can get 5 bare retro boards and 5 bare flash boards for about $25. #2) You can get one of each from me (and at least one other that I have seen offering in KZbin comments that I have seen). At the moment, I have two retro rev3 boards and two flash rev1 boards. If you are a patreon AND I have them in stock then I'll just give you a pair. Just send a shipping address to me in a private Patreon message. If there is enough interest, I'll see about setting up an on line store... I try to post a poll to see if there is enough interest.