謝謝老師的講解❤

Quigley Trafficway

Pagac Pines

at the end 7:50 , why does as A approaches 0 in the non inverting node, the voltage in the inverting node goes to 0? Wouldn't it be as A approaches infinity then the voltage in the inverting node goes to 0?

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Gerardo Neck

Thank you bro

In the case of AND gate, how can I achieve that 2 ground wires will only produce one ground wire if both are grounded? Cheers

hi hi

Only If I had come across this video last week :(

Thanks

Great explanations! I try to calculate power losses on diode during time but I did not make it. Current passing through the diode increasing temperature which has impact on voltage. Voltage is not constant as usualy predict.

The audio is very painful.

it's 1st order stop band filter ??

Thanks for the homework help Lee!!!!!!!!

but why do we want such a big input resistance??

Great video and excellent explanation. The background ruins it.

If I tell u that my lecturer did not teach us this but only told us to memorize them would u believe me? Like he did not explain how it became like that.

Nice . You have assumed the current flowing into the op amp to be zero. That means the opamp is ideal. For such a case , I think , the open loop gain Ao is infinite. Am I right ?

How can you say like no amount current is entering in to the opamp, in this case!!

Thanks a lot, I can be fully prepare to the exam in tomorrow

The amplification would be (AC - 0.6v + Vcc)??? Wouldn't the current flow to ground when AC activates the NPN??? or is that the reason why the gain is inverted?

what a simple explanation! You sir are a great explainer! Thanks

Note that, under "active low" logic, the same circuits described above still work, but with the sense of AND and OR reversed. (Consequence of De Morgan's laws).

Hi, Please take 0.7 V into consideration to turn on the Diode.

18Id^2 -24Id +8 >> Id should have only one root, which should be Id = 0.667. Please correct me if I am wrong.

Thanks Cleared all my doubts

Good standard explanation for DDL but in the past few years I have been creating all Boolean logic gates using Led's and CdS photo resistors so the gate is still DDL but also Inverts and the logic levels do not degrade. Light Logic

thanks man

牛逼

thanku

thank you

Clear To the point Well done

Best video ever on this topic...thanks a lot sirrr

Thank you !

Usually the voltage at the base of transistors will not go lower than -6 to -8 V. Lower voltages will exceed the typical avalanche breakdown voltage of the base to emitter diode. This is also the reason why the time periods of such astable multivibrators tend to get shorter or the frequencies tend to get higher, the higher the operating voltage is. It is therefore not recommented to exceed 5 V operating voltage, especially in the case of larger capacitors (muliple 100 µF). The energy of the charge can evtl damage the base emitter diode.

Thanks for the help, understood how diodes works in less than 10 minutes

why 0.25 ?

Thanks, this helped me take a nap!

Thanks a lot ! Your videos are awesome!

Nice

Can I have the name of source please

I have an exam tomorrow in this sup and i don't understand 2022 Tue ,May 17

That is just brilliant! I first saw that over 35 years ago, and it still impresses me today… 0:34 “…but the source is in parallel with that 6 ohm…”. Shouldn’t that be “in series”?

Thank you sir

12

I finally got it

Excellent explaination - I checked out a few other KZbin videos and only yours made any sense to me - and it did so by 1:20....Thanks so much!

Very good and funny videos bring a great sense of entertainment!

Thank you so much bro, you help me a lot to understand this subject, finally a understood how works and get the Vt on this calculus, thanks again!!!!