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@marjanmadani
@marjanmadani 2 жыл бұрын
That's a very creative approach. Thank you for sharing Dr. Cowan. I am curious about the effect of the damping modulation that realized by the switches Does charge injection, clock feed through, ... add distortion to the signal of next stage CH? The signal level seems to bel low (10mV ish). Also, I am assuming modulation in time needs to be synchronized to the input data meaning damping factor should be low right at the falling edge and vice versa.
@glenncowan6510
@glenncowan6510 2 жыл бұрын
Thank you for the question and interest in the work. Charge injection etc could be an issue. This was part of the motivation for a differential implementation in order to at least partly reduce these effects. With regard to output signal size, these simulations were done with a very small input. At the sensitivity limit the output will be larger. For example with a gain of 55kOhms, an input of 20 uA leads to a pp differential swing of about 1 V. The modulation signal does need to be matched, but anything within a 45 degree range was close enough.
@vikasredie
@vikasredie 3 жыл бұрын
hello glenn, looking for more lectures on optical transceiver.
@abhijithprabha6377
@abhijithprabha6377 4 жыл бұрын
useful
@vinaybhaskarchandratre7762
@vinaybhaskarchandratre7762 6 жыл бұрын
lemda is a guess work ?. Only Franco's book estimates it with a empirical (almost) formula, Baker's has two values small & large L based lemda , rest of other books do algebra of symbols !. what are your thoughts on lemda estimation when one does design trade-off ?
@user-jt4xc4op6b
@user-jt4xc4op6b 6 жыл бұрын
Мдааа готовлюсь к экзамену, спасибо за видео))
@sHrG78
@sHrG78 6 жыл бұрын
Perfect! Couldn't be any clearer.
@sHrG78
@sHrG78 6 жыл бұрын
One of the best profs in Concordia University!
@gyrtaz
@gyrtaz 6 жыл бұрын
can i avoid gate capacitance effects lowering pull-down resistance?
@abuhenamd.nazirhossain4514
@abuhenamd.nazirhossain4514 7 жыл бұрын
It's very helpful. Do you have materials that describe the overlap capacitance when the transistor is in off state?
@zynthos9
@zynthos9 8 жыл бұрын
So the miller gap, in a case where an inverter input is going 0->1, might cause the output to jump up a little big (input coupled to output)?
@007viviadam
@007viviadam 7 жыл бұрын
Zambia95 Can you please elaborate as to how that phenomenon works. I can't, for the life of me, figure out how the voltage spike drops back to the supply voltage after a moment. Also how does the spike at Vss go below 0 when Vss is 0.
@SatishJaiswalictish
@SatishJaiswalictish 8 жыл бұрын
So simply explained. Thank you!!!
@kavehdehno2331
@kavehdehno2331 8 жыл бұрын
Great video! Is it possible to make one for noise analysis?