great video! Another tip ill suggest, for 2 layer PCBs when possible use 0805 components as they allow you to run up to two signal traces underneath thus minimizing need for vias

I started learning KiCAD from one of your videos about laying out an STM32 chip with bluetooth. Fast forward 4 months and I've got a prototype board for my project. I ended up having to pretty heavily populate the back side in order to get everything on an 85x85mm board. Do you have any guidelines or rules of thumb for how much PCB area you should guestimate per chip? Like if I have a 68-pin QFN with an exposed pad, should I plan to have 2 or 3 times it's surface area of room on the PCB when placing components? Should it be the square of it's size?

Spc56alxxx which debugger tool need to buy dear how can I contact you pls send it your whatapp or Skype contact number

Hey Phil, great video as usual, however, something I noticed with your driver is that I believe that the bit order is wrong. it should be g7..g0, r7..r0, b7..b0, in MSB order. I have a feeling you didn't notice any issues since you were using 255 to test, so all the values for each bit were high anyway, but using any other value gives the incorrect brightness. I used the following and it is working for me with WS2812B leds: uint16_t bufIndex = 0; for (uint8_t led = 0; led < NUM_LEDS; led++) { // for each LED for (uint8_t bits = 0; bits < BITS_PER_LED; bits++, bufIndex++) { // loop through all 24 bits uint8_t byte = (bits / 8) * 8; uint8_t bit = 7 - (bits % 8); uint8_t bitIndex = byte + bit; if ((LED_DATA[led].data >> bitIndex) & 0x01) // If bit set DMA_BUF[bufIndex] = T1H; // set pulse high else DMA_BUF[bufIndex] = T0H; // set pulse low } }

I'm surprised you do power after your signals. Is having power make jumps over signals via the ground plane good practice? (I've been minimizing via's & tracing signals last instead)

Shipping Cost to Germany 650$? Seriously?

Nice design! Without diving that deep into the design, wouldn't it be easier fir the bigger IC (U1?, left one) was rotated 90°CCW? That way the USB traces would be more direct and it looks like the SPI lines would work fine as well.

On the bottom left of the FTDI chip, there are 3 adjacent ground pins. why not use a polygon to connect them to the decoupling cap? and also why not use a direct connection instead of the thermal relief for the ground polygon pour? isn't it better to remove the soldermask on top of the RF section (chip and traces)?

Brilliant, thank you! 👏

Looking forward to the vid on the pcb antennas. I hope the people in the far east watch it too. I have got a few esp32 boards with chip antennas that seem to be so badly matched no wifi gets out, giving a max wifi range of under 1M. :(

Many thanks Phil: always a wealth of information. Greetings.

I saw that you made this PCB in march this year. I am also currently designing a 4 layer PCB and do want to order it at PCBWay. Currently they are in the middle of upgrading their stack and I cannot find information of the stackup. Could you provide me any guidance which values I should use? Thanks 🙏🏼

Abstract: This transcript provides a detailed guide for designing 2-layer printed circuit boards (PCBs). It emphasizes cost-effectiveness as a major advantage while outlining best practices for layer assignment, component placement, and routing. The guide stresses the importance of maintaining a solid ground plane on the bottom layer and minimizing cuts for optimal signal integrity. Strategies for power routing and RF trace design are discussed, as well as the tradeoffs between 2-layer and 4-layer PCBs. The information presented serves as a valuable resource for engineers seeking to optimize their 2-layer PCB designs for cost, performance, and manufacturability. *Summary* - 3:35 Cost-effectiveness: 2 layer PCBs are significantly cheaper to produce than 4 layer PCBs, especially in high volumes. - 5:58 Design Constraints: To minimize cost, adhere to manufacturer design rules for minimum trace widths, hole sizes, etc. - 8:35 Layer Assignment: Place all components on the top layer and create a solid ground plane on the bottom layer for a clean reference. - 11:27 Component Placement: Prioritize intelligent component placement to minimize trace lengths and jump requirements. - 15:10 Routing Order: Route critical traces (USB, SPI) first, followed by less critical traces. Iterate on placement as needed. - 15:50 Power Routing: Use wide traces for power where space allows, narrowing only when necessary to reach component pins. - 16:51 Minimize Ground Cuts: Keep jumps between layers short to minimize disruption of the ground plane. - 22:36 Ground Stitching: When using ground pours on both layers, add stitching vias to connect them and improve reference. - 23:08 RF Design: For simple RF systems, keeping trace lengths short minimizes the need for impedance matching. - 28:54 2 vs 4 Layer Tradeoffs: 4 layer PCBs offer improved signal integrity and EMI performance but at a higher cost. i used gemini 1.5 pro

Great video & usefull tips. may I know how you make the layout colourful such as pin have different colour, it look cool?

All my PCB designs have been two layer so far so this is invaluable info. My last PCB worked perfectly using tips and tricks from your various tutorials. One day I will take the four layer jump...

Phil, I hope you get all of the sponsorship money in the world. You deserve it. You are the best PCB and electronics learning channel on KZbin, bar none, and I have probably seen them all over the years. You have single-handedly pushed my own level of knowledge forward what would have otherwise taken me many, many years to attain on my own. You have my eternal respect and appreciation. Thank you ❤

You are very talented and smart! Nice video Phil :)

If you keep trace lengths short, then you can just use inductances and capacitances of the traces. If you components have more inductance and capacitance, the the impact is small. But do check values.

Hey Phil, what’s your opinion on a 2-layer PCB with components on both sides BUT with a ground fill on both sides? Sometimes I’ll use stitching vias as an outline or spanning the entire board, or just relying on a couple vias near ground.

Just I am currently developing a platform for CH32V003 ❤️

I love you so much

@PhilsLab is the design for the RF Schtick available somewhere?

Hey whould love it if you can do a video about high current pcb design (15 amps and above)

Awesome, thank you :)

Do you happen to know a good book that covers designing High power circuits for power sources and driving Electric Motors?

20:08 There's some pitfalls with this though! If you aren't careful, there can be two ground planes that are only connected by a sliver, and if these two planes happen to have to carry a lot of energy, you can blow a hole in your board quite easily. The layout software wont alert you of this, as clearly the nets are connected (just not wide enough).

Phil, this was a great video as always, thank you for taking time to spread knowledge

Love your channel and the tips I can steal. Gotta slightly make fun of the solder pasted fiducials though 😅

Hi Phil! You are an inspiration! Keep it up!You help us learn and grow. Love from India!!

Great video! One sneaky thing I've done with very tight designs is route GPIOs from MCUs under the chip, then out by going through an unused pin. For example if I have a SPI bus signal that can't be swapped, I'd route it via a generic GPIO that's not used in the design. Obviously this can only be done if the pin is high impedance at boot, and it can then never be used. Can save space in a pinch though! Another option is to create a custom footprint with solder mask over the pins you don't need, so you can route under them, but some PCB houses complain about it if doing the PCBA, I've found. Obviously also some routing is easier if the component is rotated 45 degrees.

"So to speak." DRINK!

Thanks Phil for another helpful lesson! One additional trick I've seen is to cross a track on the top, by using a 0603 or larger component. This would be limited to slow-speed signals only. Of course, this adds components (and therefore cost) so it's useful only if you really need this. For example, the bottom can only be ground in some RF designs, as the PCB is intended to be attached to a heatsink of the same size. Or you just absolutely detest having tracks on the bottom, even when no one else will be seeing them!

What do you think about aisler?

“Guys , we’re skipping lunch, Phil just dropped another one!”

Good stuff, beautifull design as always

At jlcpcb going from 2 to 4 layers (50x50mm, all "base" settings and no expensive add-ons, 10pc) it goes from 50ct to 70ct per unit.

Dear phill I have to say…you channel is amazing A fully mine of knowledge ❤️ Thank you so much from Israel 🇮🇱 ❤

In your video, you advise keeping the traces short compared to trying to do controlled impedance in the RF section. Would this recommendation change if the traces were connecting to an SMA connector instead of a chip antenna?

thank you for another great video :)

👍🙏❤️

I enjoy your video a lot! Always after seeing one of your videos I get instantly highly motivated to start some new PCB design. Thank you!

Dear Phil, Thank you so much! I started watching your tutorials since earlier this year as per the requirement of my internship and now I have a job in my hand ( I am a final year EE student) before my graduation just because of your tutorials, I was able to clear interviews. Thanks a lot, I learnt a lot from your tutorials.

Thank you. This is informative.

Such a deep and detailed dive. I do feel though that it is almost never recommended to use a 2- layer instead of 4-layers specially for RF. But as you said your tips are also valid for PCBs with higher count layers. Really excited for your video with the two PCBs communicating. Thank you Phil.

Gold mine of a channel

Hi sir, I am a 3rd years student and at school I was taught to pour both the top and bottom layers of a 2-layer PCB with GND. However, I saw that you did not pour the top layer at all. Is there any reason for you to not do that? Is it to ensure that there is a definite return path of the current?

Hi Phil, there was an old video of you designing a hardware accelerator based on the artix-7 fpga with an m.2 interface, (kzbin.info/www/bejne/bpPaaWOCnqifbck). could you please provide me the vivado logic design files of the project? I couldn't find them on your github.

Awesome man learned a lot from you ❤️

Thank you so much Phil! nice Video!

That's cool and all but where are the RGB LEDs?