Ur lecture is better than my Taiwan return faculty🤣🤣🤣🤣

bhai video jaisa bhi ho, ad mast tha

Thanks for the easy explanation.

Thanks

sir lekin pehle example mei minus kyu nahi kiya x^6 x^5 etc ko

very well described

You are GOD for me

Hi sir, please make video on fault simulation

Thank you sir

Best explanation!! thank u so much sir pura smjh aa gya

thank u so much sir

Thanks

Good explaination, Thank you

This was so helpful, Thankyou!

Thank youuuuu. Perfectly & easily explained the whole concept ❤

ur teaching better than my faculty

bhut shiii

sarigaa chepuu raa lanjaaaa

Really the class was very good sir, but just a small suggestion, if you can focus on the voice (microphone) it will be more effective and understandable.

you are an absolute legend my man

Indian guy saving my exam at midnight

Thank you sir

did he say control penis?

Sir, case 2 me kya hoga

Thank you !

💌

Sir can u please make one video for xor Or xnor gate

thanks for this topic and need more topic

Thanks a lot sir you helped me to pass in testing and testability exam

Thank You bhai, full samaj gaye. kitne log dekh re ajke exam ke liye ye? 😁

bhai achha samjhaya but wo sab chodoo ye batao itne nashe mein kyun ho 🤣🤣🤣🤣🤣🤣

thanks, bro you should make a full playlist on VLSI

saving the exam a night before

do you have any book for reference of this example ?

In or gate a+1 is 1 not a

last second example for cc1(AND gate)=3 ,u have taken 2 in the example

Simple explanation. Thanks a lot

How is the value of C 1 @ 7:32

Amazing 🤩🥰

Thank you sir

thanks

how to do fault equivalence and dominance collapsing if ckt has XOR gate??

Thanks

nice work keep going👌

Very well explained brother, keep it up.

Bhot shi dhnwayad.

Keep it brother tomorrow's my exam 🙏 thanks a lot

D is already assumed as 1 and we need to propagate D to output (h) but we are getting D' This is confusing

Nice!

hello plz share your mail id i have further doubts for dft