fault equivalence and dominant fault collapse ratio in hindi

[@AbhishekAgrawal-e7j]

ur teaching better than my faculty

[@gojosensei5895]

you are an absolute legend my man

[@209_anandkumarpandey6]

Very well explained brother, keep it up.

[@VLSI264]

nice work keep going👌

[@keen_kartik]

Thank you sir

[@mosaddiqbillah7124]

Indian guy saving my exam at midnight

[@faizanmuhammad858]

Damnnnnn!!!! man you are also here

[@hashirkhattak9180]

mine too KING!

[@vibhamv5752]

how to do fault equivalence and dominance collapsing if ckt has XOR gate??

[@nikhilchaudhary4032]

Good sir 👍

[@subhamnayak4726]

what should be the criteria for nor and nand gatesif you could answer.

[@shubham9050]

Did you get nand and nor fault calculation?

[@utkarshkathuria2931]

I have a question. Why we only cut from inputs and not from outputs?

[@sumanyusingh7440]

Because we need to propagate fault to next stage till primary output for successful detection and we don't need I/P of AND gate to be zero as it will result in o/p to be zero so for fault propagation we don't take s-a-0 at I/P for and similar concepr for or gate.

[@rituroyal611]

Memory testing Vali unit b krana ok 👍

[@vasudevdwivedi3583]

ok **angootha upar**