#371

[@bm830810]

"If we want flexibility in one level, we have to standardize the level below" Wow, never thought about it this way, great observation.

[@AndreasSpiess]

It is universal and most people, particularly architects do not know it. Very bad...

[@bm830810]

@@AndreasSpiess Your high level view of the world and systems around us is priceless. though some might not think so, this video was very practical.

[@shubhamsen4572]

Metoo

[@kashififtikhar5058]

yes, the ability to explain things in such a relatively simpler way speaks to the experience and overall knowledge of the narrator.

[@PWingert1966]

Can we standardize the microcode level then? 😁

[@sefarkas0]

I love standards, because there are so many to choose from.

[@AndreasSpiess]

I am not sure if we agree...

[@AnnaVannieuwenhuyse]

As long as they aren't all incompatible with each other! Esp32 working with Arduino development suites is absolutely bonkers.

[@lawrencedoliveiro9104]

It’s an old joke.

[@isilverboy]

Ahahah! :)

[@nexpro6985]

@@AndreasSpiess that's a standard reply. 😁

[@webdeveloperninja9220]

Boss: Where did you get your electronics degree? Me: I got my electronics education from Adreas Spiess's KZbin channel

[@AndreasSpiess]

Boss: Ok. You deserve a big rise ;-)

[@bern047]

From Wiki and Google :)

[@kwinzman]

What is missing is you didn't do a test that shows that you actually payed attention to the videos ;-)

[@AppliedCryogenics]

+bitluni +eevblog +bigclive !!

[@PWingert1966]

Nikola Tesla: Andreas I am your father.......

[@dera_ng]

I have NEVER EVER EVER gotten so much value from a single KZbin video EVER! Words will never evolve to a place where it is enough to express how grateful and thankful I am to you for this video (,and neither will bytes lol. )

[@AndreasSpiess]

Glad you enjoyed it! Thank you for your kind words.

[@Beatfreak19831]

Yet another great and in depth video. Thank you Andreas!

[@AndreasSpiess]

I am glad you liked it!

[@tonybell1597]

Thanks Andreas, mind blown, I feel I can hold my own in a conversation with colleagues at work now 😀👍

[@AndreasSpiess]

Goal achieved!

[@lawrencedoliveiro9104]

Nvidia’s acquisition of ARM could drive other licensees away, perhaps towards RISC-V. This is because ARM doesn’t allow licensees to make nonstandard changes to the architecture, while it appears Nvidia is looking to do just that. Being the owner of ARM, it will be the only vendor able to do that, which would give it an unfair competitive advantage. That will antagonize the other vendors, and encourage them to look for alternatives.

[@Alperic27]

Sorry ... that is just NOT TRUE as written. ARM has different licenses, which support different types of usage of the ARM core designs. And if you look at what they have been doing in the last year alone, you will see that they have been lowering the entry barrier into making new designs... for eg they have this design start kit that lets a company take a cortex m core as bitstream (can burn it but not alter it) and then make their own custom extensions around it that they can either simulate of burn onto an fpga. This is how the RP2040 PIO was designed. You can buy the fpga board on digikey for 995$ and download the cortex m images for free today. But yes, in comparison an iCE40 board is 60$ and the risc-c core come in xhdl, python or scala code. But companies wanting to do things have always been able to do it... the statement that nvidia ‘will be the only vendor...’ is entirely without merit, but it does soud geat ... fud always does ;-) DISCLAIMER: I am neither pro nor against anything... I just like to give people FACTS rather than my own opinions.That is why I like and respect Andreas’ work so much!

[@animatrix1851]

Yeah if I'm right you can add instructions and such if you buy a costlier license

[@c1ph3rpunk]

@@Alperic27 Nvidia now owns ARM, as licenses expire they’re free to rewrite the rules. If you don’t like the new rules, fine, don’t use the chip. No other options? Meh, Nvidia won’t care. You’re analysis relies on the fact you believe Nvidia will play by the rules. It’s been proven they won’t.

[@Alperic27]

@@c1ph3rpunk well Daren.... sorry, but nvidia DOES NOT own ARM... that IS A FACT... which I invite you to NOT BELIEVE ME ABOUT, and VERIFY YOURSELF. An acquisition of that magnitude is a BIG deal, and the FTC has an equally long and complex review process BEFORE the acquisition can be allowed. So, if you check, you will see that the process has entered phase 2, where nvidia and softbank are required to answer some questions about their intentions and other modalities. If you have checked, you also know that Qualcomm has raised an opposition in multiple jurisdictions against the sell, as well as ... Huawei .. and I think at least another chineese company. So.... ARM has not changed hands yet, and information is more than opinions ;-)

[@Alperic27]

As I thought more about this, I think you may have the causality links all wrong: ARM does not prevent changes. ARM sells licenses that support making changes. They cost a lot of money because 1) ARM wanted to avoid fragmentation 2) this kind of license give access to IP that has cost millions and millions to develop over 30 years... BUT.. more importantly, there is the question of WHO/WHY want to make some changes to this IP? The easiest way to understand that is to look at who makes changes today, or who is jumping early on RISK-V. WD as an eatly adopter: what they want is to have a consistent toolchain to build some highly specialized chips (controllers). So to them, and many others who are doing specialized chips, they dont want to have a complete arm8 or arm9 core, much less all the interconnect to have multiple cores on a single die.... for them the base risc-v core ISA (integer) is plenty... that and the decoding/execution pipeline that goes with it. for these people, a full ARM license is very costly for very little value as they most likely want to remove functionality rather than modify any of it. Of course there are the ones who may want to add some specialised ports to handle some tasks tasks in the hardware... but these people can do it today .. the rp2040 likely did not require a full license for the rpi foundation to design the PIO peripheral. So, to fridge vendors wanting you to be able to manage it from the internet, most ARM cores are overkill.. therefore I believe that the ‘but the license is expensive’ argument is bogus.... if you have ever worked with fpga/xHDL then you may have seen that copying IP from opencores for your own design is not always easy (maybe it is just that I deeply suck at it), so the ‘oh but look, the IP will be reusable accross designs’ seems to me also dubious. the ‘not invented here syndrome’ will likely lead to more ‘yeah momy look i shared my cpu design on github’ than it will to ‘let me reuse this intelligently designed IP core’. much of the opensource code on github is IMHO of bad to deplorable quality, so the same could happen with HW designs that will be filled with statically defined multipliers/divider constants that could make porting any parts a nightmare

[@readytheeskimo]

Great video! Thank you for starting from first principles and including the business interest side of things. I started my career in semiconductors (pre-silicon verification, architecture, and design). I really enjoy the way you explained and simplified the overall market and motivations. I will gladly point to your videos in the future when friends ask to understand the concepts you presented.

[@AndreasSpiess]

Thank you! My intention was to create a comprehensive view. So I am glad you like it.

For me the RISC-V based ESP32-C3 is interesting, because for RISC-V there's already an official LLVM backend present, which allows coding in alternate languages like Rust. That's not currently possible on Xtensa, and they seem to have little interest to complete one. (I know there's an official repository, but it moves really slowly).

[@AndreasSpiess]

Is this also the case for the periphery like WiFi ?

​@@AndreasSpiess I'm not familiar with how the WiFi stack operates on the ESP32-C3, but afaik Espressif ported all the necesarry code of their custom FreeRTOS SDK for the RISC-V architecture, and that contains the usual API calls for the WiFi stack. Rust compiles to native through LLVM so as long there's binding for the API calls, it should be possible to access all things similarly. I don't think there's such ESP32-C3 specific Rust bindings at the moment, but it's only a matter of time, and a more skilled person could probably autogenerate that from the C headers. For the RTL8710 there's the freertos_rs crate for similar purposes: polyfractal.com/post/rustl8710/

[@MegaBarmaglot]

Great video. Btw, happy birthday Andreas!

[@AndreasSpiess]

Thank you!

[@josephsebastian943]

Hope RISC-V gets widely adopted. Great video!

[@AndreasSpiess]

Agreed!

[@Alperic27]

I will ask a stupid question.... what do you think it will allow that cannot be done today? .... .. .... dont get me wrong.. I love to read assembly language.. and understanding how to build my own add-2-then-substract-5 machine instruction was a very ... pointless but exiting experience.... but most people here will only ever program their boards in C or python... so they will NEVER see if they run on a risk-v, mips or arm core.... simple fact. but i love the name risc-v, it sounds much cooler (forget that it just means it was their 5th time defining a new ISA for teaching) you want to truly FEEL empowered today? Learn to program the RP2040 PIO... and do it in C, not in python ;-)

[@josephsebastian943]

@@Alperic27 Understandable. But in the grand scheme of things, widespread adoption will hopefully see more custom Soc being made. For example, there are already many companies working on RISC-V cores for AI workloads. And most of these companies will end writing APIs for them. As an end result, I would hope, that I don't need to buy a Jetson Nano, but rather something much cheaper even if it has 1/10 the performance. Right now there are not much others which can do that. Like your said, most users will still be using C, and that's good IMO, especially for beginners.

[@Alperic27]

@@josephsebastian943 I apologize if my remark may sound ‘antagonistic’, let me assure you it is not my intention... I honnestly think that most people do not understand what risc-v is or means for the future Again I ask: for what tangible benefit? ‘Core’ is a misleading word that covers multiple realities. For eg, the jetson nano soc contains 4 a57 ARM cores, which make it a full blown general purpose cpu. That part has nothing to do at all with the ML part which is made of 128 maxwell cores (these are completely different core from the base risc-v integer core for eg). The maxwell core are not covered in the risc-c modular core IP, and the fact that many companies are building new AI cores will not change that. Burning them into a discrete asic or as part of an soc does not change what they are or how they work... risc-v, mips or anything else has zero influence here. Neither does having an API has anything to do with what an ISA is or does. Another eg: today coral is a dedicated asic that can be programmed with a library or used transparently in a tensorflow model. The only reason why people have not made more asics is that 1) the knowledge is scarce, 2) the manufacturing is expensive... not that people cannot do it, or need to risc-v ISA to be able to finally do it... truly unrelated!! Google chose to package coral either as a complete board with a NXP quad a53 core soc or as a simple usb dongle. Adafruit is also prototyping a spi (think i made a mistake here.. could be I2C) board with the coral asic. Now the intersection with risc-v will at best be that 1) someone will make an ISA extension for ML to expose some low level tensor operators to abstract what the coral asic or the maxwell cores do (via the nvidia libs), or 2) the next generation of coral-like asic may be replaced with SOCs like nvidia did with jetson... but that may actually mean LESS FREEDOM... as the main cpu will be chosen by the soc vendor.... I much prefer to have more coral like solutions where I can even attach it to my Raspberry PI if I want, instead of being limited to use whatever the soc will contain. But yes... there will be another benefit that you have not mentioned: IF people share some ML ISA extensions, then you and I will be able to burn them ourselves onto an ECP5 class fpga alongside a pico-32 or rocket core, and .... and what? .... we will have to wait for someone to also opensource the tensorflow library that will use these new instruction, and more importantly wait for them to be supported in the GCC backend......... .... but it will be fun, when it happens... in a couple years? Until then, tinyml can do a lot of things on a simple arm core.

[@josephsebastian943]

​ @Alperic27 First off, don't worry, I feel like we are having a healthy discussion:) I understand the confusion regarding my use of "core". What I meant is that, in general, more people (who have the knowledge to design custom cores) can create application-driven SOCs; But of course if not for the mass market, it would not make a ton of sense to do that. Companies like Esperanto are working on this kind of stuff (they created a RISC-V based SoC with 1000+ cores targeted towards ML workload for server-side application). I agree that the coral is a good platform, and deserves more recognition (I am planning on getting one of those Coral Modules/ dev board for some vision-based projects). Right now, TensorFlow (Lite) Micro is still a work in progress; last I checked they are still porting most of the operations from TensorFlow Lite. Hopefully, we get a standalone TensorFlow package for Microcontrollers. TBH it seems that you know much more about these things than me; I am more of an applications person who doesn't have to care what ISA it is using. Nevertheless, it is exciting to see some competition for ARM.

[@ukaszwos8264]

Happy Birthday! Lots of health and a hundreds years of life! We wish you that your films have the greatest possible reach :) And of course thank you for your creativity! You really help us :)

[@AndreasSpiess]

Thank you!

[@aronhighgrove4100]

hundreds* ;)

[@ukaszwos8264]

@@aronhighgrove4100 thx :)

[@shivamkapoor1827]

He is hundred years old already

[@PhG1961]

Quite a comprehensive and detailed overview. The future looks very interesting with this kind of development. Looking forward to see the next experiments.

[@AndreasSpiess]

We are all interested viewers in this show, I think...

[@rjhornsby]

Interesting and informative - have been in the IT industry (mostly Linux-related stuff) for longer than I want to admit, still learned several new things from this video. Your presentation of so much history/material is organized, coherent, and easy to follow. Well done!

[@AndreasSpiess]

Thank you for your nice words!

[@r.in.shibuya]

Hello again from Tokyo Andreas! I felt the same way so we became RISC-V members.

[@AndreasSpiess]

Cool!

[@simoncollins6650]

What a great summary. I think this should be compulsory viewing for engineers at university as not only does give a great statement on RISK 5 but a history lesson as well. A Brilliant episode. Thank you. Simon

[@AndreasSpiess]

Thank you! This history is part of my life...

[@michaelangellotti5741]

Thanks for the trip down memory lane. I knew most of it but you did an excellent job telling the story. Well done.

[@AndreasSpiess]

Glad you liked it!

[@pinealservo]

I think it's worth noting that pretty much no semiconductor manufacturer uses a single ISA across their whole product line. The Maker community tends to have a somewhat narrow view of the world of CPUs and MCUs based on what's in PCs, powerful consumer gadgets like phones, and things that have been associated with some Open Source projects before. This is for pretty good reasons; you tend to have to pay a lot of money for development tools outside this little slice of the processor world, and they're marketed to specific kinds of companies. But they make up really significant parts of the whole semiconductor ecosystem, so you have to be careful about assuming the importance of one ISA family like ARM even if it's completely dominating the Maker-visible parts of the semiconductor world right now. RISC-V definitely has the potential to eat into the share of the market that ARM currently dominates, but as you noted, the ISA itself is only a very tiny part of the picture. ARM provides not just an ISA, but several reference design implementations of it, a number of bus architecture designs to connect various kinds of peripherals, a line of GPU designs, etc. This stuff is very mature and very well supported with 3rd party hardware IP and software. It's going to continue to dominate in parts that are meant for end-user programming for a while! RISC-V is going to first take over where companies need CPU cores to run the internals of some in-house hardware design. You can see this from the interest shown by Seagate, Western Digital, Nvidia, etc. It's going to run inside the *peripherals* of computers first, where users mostly won't even be aware that there's a CPU involved at all. I think it might also stand a chance of being relevant to "hyperscaler" data center hardware, where PC-born bus architecture standards are in place already and there's a ton of cash to burn on long-term projects that'll result in cutting out ARM license costs in the long run, and the software stacks are internally-maintained by armies of programmers. I can also see Apple looking at RISC-V for future gadgets; cutting ARM license fees out of products where possible seems like a very Apple thing to do. Espressif choosing RISC-V for its ESP8266-replacement follows along these same lines; if you remember when the ESP8266 first hit the Maker scene, it wasn't really meant to be user-programmable; it was just a super-cheap WiFi chip you could hook up to an Ardunio via serial and control via AT commands. A lot of radio chips are designed like this; they take care of some layers of the radio protocol on their own, and you communicate with them over some serial bus from a more powerful MCU. Their choice of a weird Tensilica CPU architecture doesn't really hurt anything if they're the only ones coding for it, and switching to RISC-V makes it even more accessible now that Makers have exposed the usefulness of the chips when loaded with custom firmware. Don't think for a minute that STMicroelectronics is wedded to ARM, or that they won't embrace RISC-V if they see a benefit to it. They embraced some odd architectures in the past, and they still have a sizable line of 8-bit STM-8 and automotive Power MCUs. There may not end up being a reason, but I wouldn't be surprised either way.

[@AndreasSpiess]

I agree with your statements. And I am far from saying that ARM is dead. I am too old and saw many such wars. I tried to give an update from today's point of view and hope, I di not do too much prediction for the future.

[@joehopfield]

I graduated math/computer science at UCLA in 1981. At that time there actually *were* multiple architectures and diverse ecosystems. The curriculum *never* discussed economics or how engineers fit into ecosystems. This huge blind-spot helped monopolies like ibm/intel/microsoft crush creativity. Thank you for your always excellent content.

[@AndreasSpiess]

You are welcome! BTW: I added a Business Administration PhD to my EE training precisely because of what you describe. And I never regretted ;-)

[@4mb127]

Just wanted to say thanks for doing what you're doing, Andreas. You're awesome.

[@AndreasSpiess]

You are welcome!

[@RanjeetSingh-nr5sg]

Very nice quote: Standardization on lower level, flexibility on higher level. Hats off sir

[@AndreasSpiess]

This is very important. I suggest you never forget it!

[@RanjeetSingh-nr5sg]

@@AndreasSpiess 🙏 I'm from India and huge fan of your work sir. 🙏

[@anthonvanderneut]

12:44 I always thought ARM was build out from Acorn ( producers of the BBC Micro and Acorn Archimedes) and that Apple got interested in RISC much later.

[@AndreasSpiess]

You are right. I had to leave that out (as many other things)

[@pinealservo]

The original ARM architecture was created by Acorn as the "Acorn RISC Machine"; they did a couple versions on their own and then spun out the processor design team as a joint venture with Apple and VLSI Technology as Advanced RISC Machines, Ltd. in 1990. So, Acorn, Apple, and VLSI all owned some share of the original ARM spin-out business. Apple was interested in using the architecture as the CPU in the Newton. In 1998, the company went public on the London Stock Exchange and NASDAQ with a name change as ARM Ltd. They remained an independent company until purchased by SoftBank in 2016, and in Sept 2020 Nvidia announced plans to purchase them from SoftBank, though that's not yet finalized.

[@iwbnwif]

There was also a period of Acorn ownership by Olivetti - best known as a dot matrix printer manufacturer I think. I may be wrong, but I seem to remember ARM IP was not included in the Olivetti deal though.

[@pinealservo]

@@iwbnwif Olivetti was originally a typewriter maker, but they got involved with computers early on and made one of the first transistorized mainframes. Adriano Olivetti, the son of the founder of the Olivetti company, created the semiconductor foundry SGS to make reliable diodes and transistors for Olivetti's mainframes. SGS later merged with Thompson Semiconductors to form the company we now know as STMicroelectronics!

[@martinrcflyer4089]

Wow, this is an awesome video. It’s packed full of insight, including some thoughtful ones concerning industry and company strategy. The video is only 25 minutes long, but I feel us viewers are benefitting from years of experience and knowledge. I just wonder how many hours (even years) you spent in the making of this video. Thank you for sharing. What a gift to the community. Truly Open Source!

[@AndreasSpiess]

Thank you for your very nice words! Indeed it took nearly my whole life to create this video.

[@simonkufeld7903]

Thank you so much for keeping us updated on the latest developments in the maker/microcontroller world!

[@AndreasSpiess]

You are welcome.

[@ellisdeon]

Another great video, thank you. Happy birthday from South Africa

[@AndreasSpiess]

Thank you!

[@martinger327]

An important issue for RISC-V is the fact, that chinese companies have to get independant from American-owned IP. And this is an issue for European companies and countries as well, as it might become a topic in trade wars and a subject of manipulation of NSA and friends. Thus it is quite a good idea to become somewhat independant from American-owned IP at least in critical infrastructures.

[@ciano5475]

Well, they can develop their own IP based on RiscV ISA without paying anyone.

[@AndreasSpiess]

Global politics also can have an influence, I agree.

[@GeorgeLeite]

Brings me back. I worked on Unix compilers from 88 to 95. I worked on every RISC chip mentioned, plus Intel and Motorola CISC. You covered it very well.

[@AndreasSpiess]

Thank you!

[@newburypi]

Just want to tell you that I quite appreciate your detailed reviews of these new devices. They simplify the job of selecting appropriate processors and sensors.

[@AndreasSpiess]

Thank you!

[@thedevleon]

Super interesting video, thanks for the clear explanations!

[@AndreasSpiess]

Glad it was helpful!

[@nowareman5655]

I love your channel... I have learned much from you already.. thanks brother.

[@AndreasSpiess]

You are welcome!

[@ogmaker]

Andreas, I think you are spot on. I do think that you missed the part of history where people discovered that you could do general purpose computing on small microprocessors. Many of the hobby computer people used Motorola chips at that point (and some Texas Instruments). The primary ecosystem was CP/M. The combination of IBM getting into the business of personal computing and Apple's meteoric growth created a business vector that essentially killed all the CP/M companies. Indirectly you said "Business forces standardization, Engineers abhor it." I started my computer career in the early '70s and can only say that it is the natural ying/yang of people who create vs people who control. Thanks for the terrific video on RISC-V. Very well done.

[@AndreasSpiess]

You are right, I could have started earlier. But the early developments were not too important for my story about RiscV. As said, I had to destill a lot!

[@portblock]

in all honesty, This is one of the best descriptions in the amount of time you spent from the A to Z you covered!!! great distillation.

[@AndreasSpiess]

Thank you for your kind words!

[@nowareman5655]

Never enough open source software let alone hardware. COOL.

[@AndreasSpiess]

:-)

[@diablo1281]

The best analogies I ever heard! Great job! Love your work :)

[@AndreasSpiess]

Thank you!

[@alexandern8671]

Actually the title was a bit misleading, I thought I would not spare that much time to watch that content, and shelved it. Got a bit of time and get acquainted with very thoughtful and well researched review covering very many aspects of technology, business and history of electronic developments. Excellent video Andreas, a real gem.

[@AndreasSpiess]

Thank you. Where do you think the title was misleading? I thought I covered the open source aspect in he video and how much open source the -C3 is.

[@alexandern8671]

@@AndreasSpiess I perceived the video would be mainly dedicated to the ESP32-C3 that does not have a robust toolchain at the moment thus not my piece of cake. The video was so much more than that. I would like to add one consideration to your CISC vs RISC discussion that was far from evident to me : CISC was not an oversight; at the time RAM was so expensive that it was much more economical to make the processor as sophisticated as possible to reduce the required code RAM footprint. (Just compare the number of FETs spent in a recent megaprocessor.com design on the decent 16 bits CPU and paltry 256 B memory.) The step change came along with the Gordon Moore's observation that was actually related to RAM chips. When there was enough fast RAM, design effort became focused on the CPU, and now the memory is lagging behind processors hence caches.

[@AndreasSpiess]

You are right with the expensive memory. And before RISC, nobody talked about CISC. We just had microprocessors. Only when RISC appeared they talked about CISC.

[@alexandern8671]

@@AndreasSpiess Yes, coining the term RISC undeniably helped promoting the concept of having more registers and exchange data with the memory using the dedicated instructions only. But it could be confusing to those who joined the party later.

[@PRX5]

Very, VERY well done ! A top illustration of "Gesunder Menschenverstand" and how simple the world can become when you have learned how to use common sence.

[@AndreasSpiess]

Thank you! I would add a part "abstraction" to the common sense ;-)

[@albygnigni]

Thanks for the in-depth video! I think that some maker companies like sipeed and seeed are doing a great job in pushing riscv for the maker market

[@AndreasSpiess]

We will see if they will deliver a Arduino compatible environment. Otherwise it will be hard for them in the Maker Market, I think.

[@albygnigni]

@@AndreasSpiess most of them are pushing for micropython

[@AndreasSpiess]

I made a video about MicroPython 2 years ago. There you see my position. But you can also reads the comments. You do not find another MicroPython video on this channel since :-( But with the appearance of Pi Pico it might change...

[@BaronVonBiffo]

Happy birthday from Ireland (where we drive on the correct side of the road ;-)).

[@AndreasDelleske]

You are also on the correct side of the EU border :)

[@BaronVonBiffo]

@@AndreasDelleske :-)

[@AndreasSpiess]

@BaronVonBiffo Thank you!

[@egironyt]

Andreas, this video was more fun than 3 movies back to back! Congrats 🎉

[@AndreasSpiess]

:-) Thank you!

[@claudiomoles]

Very good analysis of what is going on behind the curtains, makers are always so deep involved in their projects that they so not know what is coming from where. It is very difficult to find all these information in one place like your video and surely this will help makers to make decisions if/when they want to go for business. thanks for the deliting "nerd" videos I watch every sunday morning.!

[@AndreasSpiess]

This story is part of my life...

[@YoutubeBorkedMyOldHandle_why]

As a teen, many years ago, I along with two other friends were avid photography fans. We each bought SLR cameras ... but different brands. I had a Pentax, one friend had a Nikon, and the other a Canon. We often spent hours upon hours, as young people do, debating the merits of one system vs the other. But in truth, functionally these cameras were virtually identical. Except of course, they were completely incompatible with each other. Nikon lenses, filters etc. fit only Nikon cameras etc. There were other camera companies as well, which were similarly incompatible. They all deliberately avoided any standard ... presumably to force customers to buy only their products. Then Tamron came along, introducing the t-mount and a whole series of 'really great' lenses, which could be universally fit on any of these cameras, simply by switching inexpensive t-mounts. Tamron came into existence and thrived, by exploiting the lack of standardization in the camera industry. ... and so it continues.

[@AndreasSpiess]

A very good example how non-standard things can destroy value. You three probably only needed one particular good lens. Like that, non of you had one. But you had three very similar sets for the same price...

[@TalpaDK]

Uhmm sweet sweet vendor lock-in.

[@ohgosh5892]

@@AndreasSpiess The problem with lenses and optics is that most coupling rings do not permit focus out to infinity. The Tamron improvement was making the lense infinity available using their flexible lenses. Exit barrier is the lock-in mechanism.

[@YoutubeBorkedMyOldHandle_why]

@@AndreasSpiess I just re-watched your video and have a few more comments. You made the point that RISC-V is a competitor to ARM. I think there's another reason RISC-V will soon take off. The USA seems determined to deny China access to technology, presumably to protect American IP and security concerns. It's not a simple question of royalties, China may not have access to ARM at all. This is forcing them to seek alternatives, and RISC-V is an obvious solution. By denying access, the USA may inadvertently unleash a flood of cheap alternatives to the market, which could come back and bite them. Forcing your opponents to innovate, may have unintended consequences. For the rest of us however, this may be the beginning of a huge opportunity. For the past 2 weeks I've been tinkering with some ESP32-C3 modules which I recently bought on AliExpress for around CAD$3 each. My goal was to set up an environment for RISC-V assembler programming, including hardware debugging. I've done this on Eclipse and can tell you that it works great, especially since the ESP32-C3 chip includes an onboard hardware JTAG debugger (super easy to use.) And ... as you suggest, there is also a LOT of additional functionality on these chips besides just the open source RISC-V ISA. Setting up the environment is not for beginners, but others have done it, and there is a fair amount of information available for those wanting to try. For beginners, these are still very powerful and super affordable boards, which are fully supported on Arduino etc. My point is, 'now' might be a real good time to start embracing RISC-V.

[@headbanger1428]

That was amazing coverage! You're always awesome Mr. Spiess! I have lots to consider now. My stomach turned when I heard Nvidia bought ARM. I didn't see how that was good for anyone except Nvidia, if it's even good for them in the long-run to survive the blowback. Many IT I know are buying up AMD because they perceive Nvidia to start bullying more, and they wish to stay flexible.

[@AndreasSpiess]

The deals seems not done yet. We will see what happens...

[@harrykekgmail]

The guy with the Swiss accent has a particularly sarcastic & interesting dry humour! Thank you for your Clear Concise lesson.

[@AndreasSpiess]

You are welcome!

[@nsknyc]

Andreas, this 'diluted' video was absolutely fantastic. Easily digestible. Thank you sharing this.

[@AndreasSpiess]

Glad you enjoyed it!

[@nowareman5655]

I definitely desire to develope and encourage others to create exclusive alt competing wireless Internet and peer to peer mesh networks.

[@mahudson3547]

A very concise and interesting analysis. Thank you. I suspect greed will continue to distort the utopian solution?

[@AndreasSpiess]

Unfortunately it is not easy to distinguish between "good business" and "greed". At least not for me...

[@efimovv]

@@AndreasSpiess not sure how to translate correctly to English... but once I hear great way to distinguish: great businessman is always immoral beast. If you see businessman who is good man, probably he is bad businessman...

[@nikolaradakovic5050]

what a precise :) and clear explanation, not fluff straight to the point, echte Schweizer

[@AndreasSpiess]

Thank you!

[@khushbooamin539]

Loved your infotertenmaint.... Also loved your way of simplifying it

[@AndreasSpiess]

Glad you liked it

[@dragonfly-7]

Grüzi Andreas ! I'm watching your videos in an intermittent kind for some time now and must admit that it always had been fun to listen to your staements. I learnt a lot. But this video is prepared excellently - even 2 years after it was released ! Great job ! Keep on doing like this !

[@AndreasSpiess]

Thank you! The content of this video probably will age well because it is logical and not technological ;-)

[@phildavis1723]

Great presentation, I learned a bunch of stuff that I hadn't before, despite my obsession with tech videos. Anyway, I understand your disappointment about the amount of open source on the silicon, but the piece that IS open source, I think, is exciting enough to still make it pretty exciting. That common standard you talked about will provide a free means to compatibility for a vast number of companies, and hopefully, software! I'm happy to wait for more open source silicon, because of the possibilities we will have now! unless I misunderstand something, which could easily happen here!

[@AndreasSpiess]

I am sure it has its potential. But a long way to go...

[@hassinayaz7310]

No one else would have explained it better , thanks 🙏 a ton

[@AndreasSpiess]

Very nice. Thank you!

[@VerilogTutor]

Excellent video. I think we will see more open source chip designs, e.g. coming from not-for-profit organisations like LowRISC where all the RTL is open source. You can also get chips manufactured for the order of €10k or so through Europractice, which is doable for University research projects that might want to add new experimental features to an open source RISC-V core, which is not something you can do with an ARM core. A couple of minor corrections: you usually hand off GDSII to a chip foundry, not RTL; Windows NT was supported on DEC Alpha.

[@AndreasSpiess]

I agree. As said in the intro: I will shamelessly simplify. Unfortunatly, NT did not help the Alpha too much :-( This says an ex DECie..

[@AbuzarToronto]

One of the best and most practical summaries/overviews I've seen. Good job!

[@AndreasSpiess]

Thank you!

[@billfield8300]

Thanks for the great lecture. I feel like I just got an introductory lesson for a computer engineering degree for free. Very interesting and informative. And apparently it is your birthday. Congratulations!

[@AndreasSpiess]

Glad to see you back! Thank you for your wishes.

[@MJRoBot_MarceloRovai]

Thanks a lot, Maestro! One of the advantages of living in the south of the world, is that I can wake-up early on Sundays and have my coffee ☕️ following this fantastic channel. Today was a must! Greetings 🖖 from 🇨🇱 (by a Brazilian 🇧🇷 ;-)

[@AndreasSpiess]

Glad I am part of your Sunday morning procedure!

[@neur303]

Thanks for bringing this to a broader audience and clear explanation. RISC-V hopefully will bring more flexibility to all of us. There is hope 👍

[@AndreasSpiess]

Agreed!

[@lancecluster]

The first portion of this would make for a wonderful Economics Course discussion. Nice Video

[@AndreasSpiess]

You are right. It seems that professors use it for such courses :-)

[@ricardoislasruiz3186]

I just discovered your channel and I cannot stop watching your videos! Excellent!

[@AndreasSpiess]

Welcome aboard the channel!

[@ricardoislasruiz3186]

@@AndreasSpiess thank you so much! I have not worked with microcontrollers since a lot of time and yesterday with you videos I discovered the ESP32 familiy OMG! 😍 it is beautiful!

[@abpccpba]

Andreas; Great presentation. I had no idea how complex this silicon world is.

[@AndreasSpiess]

And this was only the tip of the iceberg ;-)

[@Serpent10i]

This was incredibly informative! Thank you for all the details and relivent background.

[@AndreasSpiess]

Glad you enjoyed it!

[@YandiBanyu]

Very well made video. Well done!

[@AndreasSpiess]

Thank you very much!

[@horrorhotel1999]

as private makers we can also use ANY IP in an FPGA to our hearts content as long as we don't commercialize our product. That is one of the few beautiful advantages of Patents: the knowledge has to be on the table

[@AndreasSpiess]

I agree (If the creator provides you with the needed info to implement). Which is usually not the case if it is not omen source.

[@avejst]

Great video as always 👍 Thanks for sharing your knowledge to all of us 👍😊

[@AndreasSpiess]

Thank you! Glad you liked it.

[@brainfoolong]

Never watched such a dry thematic with so much joy. Great explanation, nice voice, good presentation. Keep up the good work.

[@AndreasSpiess]

Glad you enjoyed it!

[@AjinkyaMahajan]

For makers, Diy open-source CPU on FPGA is entirely possible. A small basic MIPS or OpenRISC architectures are fully opensource. I have used RISC-V board (Maixduino with K210 SoC) in the past, and compared to that, I have always loved STM 32 performance and price. I love the open-source community for Academic and research purposes, but RISC-V, although have a selling point of open source it is clearly not. While Comparison of ARM and RISC-V, the I clearly dont see and advantages of RISC-V over ARM. Maybe some day diy community will come up with their own CPU core and i will see a video about it on this channel. Thanks for a wonderful content✨✌😇 Cheers ✨

[@AndreasSpiess]

Thank you for sharing your thoughts.

[@programorprogrammed]

I loved that chart (3:36) of all the Arm ISA levels, that's going in the collection. Thanks! Wow this was great video.

[@AndreasSpiess]

Glad you enjoyed it!

[@TednTin]

I really love this video. Has explained in a systematic manner with basics. Edit: Can't imagine the amount of research needed for presenting this complex of a topic so appetizing.

[@AndreasSpiess]

Glad you like it! It took my whole business life to get all the info ;-)

[@afraniopedreirajunior6064]

Happy birthday Doctor Spiess, here from Brazil, Afranio(father) and Caio(son)!! Thank you for teaching us so much content! Health and Peace! God bless you!

[@AndreasSpiess]

Thank you very much! Greetings to Brasil, too!

[@codigoBinario01]

Excellent review of the state of the question. You show the big picture in this video. Congrats and thanks Mr. Swiss Guy!

[@AndreasSpiess]

Many thanks!

[@jackhoffman6120]

Windows did actually run on other platforms and not just Intel x86 platforms. Windows NT 4.0 and its predecessors supported PowerPC, DEC Alpha and MIPS R4000. Windows RT was specifically created for computers with ARM architecture where ARM is still used for Windows smartphones with Windows 10 today. Source: en.wikipedia.org/wiki/Microsoft_Windows

[@AndreasSpiess]

Agreed. But I never saw a big traction from the other hardware because the application SW often was not compiled for that ISAs.

[@malteplath]

Excellent! I really appreciate the historical background (even if very subjective and abbreviated) and the effort you put into explaining the economic context.

[@AndreasSpiess]

Glad you enjoyed it!

[@amitdeshpande9863]

Many many happy returns of the day Andreas... Keep inspiring us with many more such videos...

[@AndreasSpiess]

I will!

[@jcamargo2005]

Thanks for the high level view on standardization

[@AndreasSpiess]

You are welcome!

[@boboygogo6101]

It’s an interesting way it has been presented. As an electronics engineer, with in-depth knowledge in hardware design and low level programming, this is just an introduction and need more into details I can interact with.

[@AndreasSpiess]

This video is exactly directed to the opposite: It should show patterns and not details. Which is often not seen by my fellow engineers.

[@bertbrecht7540]

You save me a lot of time Andreas. I was planning on investing much time in purchasing a RISC-5 board and understanding it as best I could. I will spend my time else ware. I learned so much.

[@AndreasSpiess]

Glad I saved your time! BTW: Nice name you have ;-)

[@LarryKapp1]

Understanding all that is one thing - presenting it so others can get a grasp of what you are talking about is another thing . Thanks for the distilled alcohol !

[@AndreasSpiess]

You are welcome! We will see if I did an ok job. I expect a lot of discussions...

[@lammingmik]

Andreas: Excellent. Answered all my most pressing questions. Well done as usual.

[@AndreasSpiess]

Thank you!

[@riz94107]

I knew a lot of this stuff, having lived through it the first time, but I really like how well you put the pieces together. I am very interested in the implications of new technologies and your perspective is very helpful.

[@AndreasSpiess]

This video tells also parts of my life ;-)

[@simpleton6813]

I really appreciate the amount of research and presentation value in this video. Your knowledge and facility to convey complex topics is sublime.

[@AndreasSpiess]

Thank you!

[@maxheadrom3088]

Mr. Spies: I think you forgot Motorola there. RISC does not make programs that longer since complex instructions are rarely used. The first ARM or Acorn RISC Machine was so power efficient when they first tested it it was drawing no current!!! They then realized they forgot to power it ... but it worked, nonetheless, only with the power supplied by the other connections. The guy who developed the instruction set is considered one of the most important women in computer history: Sophie Wilson (with Steve Furber). Your explanation about standardization is awesome! (F1 cars have the break on the left foot ... but we can't rent them).

[@AndreasSpiess]

For me, Motorola was more important in the smaller systems and in the 1980/90. That is why I subsumed them in the "others". I did not feel they had a big role towards RISC-V

A difficult subject to cover. Very well explained. Thanks!

[@AndreasSpiess]

Glad you enjoyed it!

[@desertfish74]

The little pointer hand pointing ☝️. 😃

[@AndreasSpiess]

:-)

[@gillesgonthier4976]

Excellent video to recall history of chips technology, very good job, well done! Thanks a lot Andrea.

[@AndreasSpiess]

Glad you liked it!

[@hassanzahin1534]

Perfect timing. You managed to release the video in exactly 2 week.

[@AndreasSpiess]

??

[@hassanzahin1534]

@@AndreasSpiess In the last video, you told me that the video on esp32-c3 was coming in 2 weeks.

[@AndreasSpiess]

This prediction was not difficult because it was already finished...

[@mrksaccount123]

Extremely wonderfully explained Just the correct level of simplification!

[@AndreasSpiess]

Thank you!

[@Cam2Art]

Anecdotally started my professional software career programming the 6502 in assembly which is considered more RISC(y) then the other 8 bit 8080 derivatives. And a few years later in 1989, ended up in Zurich for about one year all expenses paid, the Swiss said I lived better than they did, residing at Steinweiss Strasse 4 working as a Linux software engineer for a Swiss company supporting their banking software on site at various banking establishments, including the Canton banks in Zurich and Basel and Bank Sarasin.

[@AndreasSpiess]

I started with the Z80 and never worked for banks. Maybe there is a correlation I do not know ;-) But in Zurich you were at the right place. I hope they Paid you well.

[@BlueyMcPhluey]

truly fascinating video, I came looking for a single piece of information and left with a fresh new perspective on the world -- very nice

[@AndreasSpiess]

Glad you enjoyed it! Yes, I tried to use this example to explain a few generally useful concepts.

[@TobiasFrei]

Oh, schon vor ein paar Tagen gesehen. Danke Andreas für die Einschätzung zu RISC-V ☺️

[@AndreasSpiess]

Bitte, gern geschehen!

[@fliprim]

Really great historical summary!

[@AndreasSpiess]

Thank you!

[@wazzamolloy]

Ok... Nice video. I appreciated the details about RISC-V. You said at the start that you simplify things but they can mislead. 1. The early broad programming APIs were UNIX system calls and in the 8080 based operating system CPM. Microsoft's DOS was based on this but took standardisation many steps further with the idea of device drivers and DOS interrupts. 16 bit windows built in DOS. 2. Windows NT, later becoming the modern Windows, has long supported compilation to non-x86 ISAs. Originally, PowerPC, MIPS, Alpha, as well as Intel. 3. Originally Intel had partnered with AMD to produce some CPUs, like 40MHz 386 and 486 as well as some 286, from memory. That's how AMD became an x86 licensee. I had a 386 that had both AMD and Intel's name on it.

[@AndreasSpiess]

Thanks for your additions. As an ex DEC employee of course I knew about NT and Alpha. Unfortunately nearly nobody was interested :-(

[@wazzamolloy]

@@AndreasSpiess Alpha was brilliant but needed more support to gain traction in the market. If I recall, AMD licensed the memory bus design for Athlon and AMD 64 bit extensions.

[@nand3kudasai]

That little pointing hand makes me laugh but i really like it . 😂👍

[@AndreasSpiess]

:-)

[@maxtester8824]

As always useful AND interesting, Andreas! Thanks a bunch for this comprehensive overview!

[@AndreasSpiess]

Glad it was helpful!

[@crckdns]

aaaah! I thought you were speaking about the ESP32-S3 in the last video, not the C3 Version :D Ok, I'm gonna watch this! But the mentioning of FPGA already excites me! edit: very cool video, thanks for that overview! I'm sure, i'll also stick to the Sx Line of the ESP32 series. But I'd love to see some more of FPGA stuff in the maker scene :D

[@AndreasSpiess]

1. I do not have any S3 chips (so far) 2. Unfortunately I did not find a lot of cool Maker projects for FPGA where you do not need a Ph.D. to understand them :-(

[@crckdns]

@@AndreasSpiess I hope you get one of them soon :) 👍 in the end you are the most known swiss maker! Hmm I know one cool project! FPGA based Ethereum miner! I think there are even HDL sources for that available 🤔 And if not.. oh well, it's never too late for PhD XD

[@AndreasSpiess]

I already have one (in Business Administration) This is probably why I so far did not care too much about the blockchains :-(

[@useyourbrain2022]

I learned a lot today! and understand the reason of many things that I did not understand before

[@AndreasSpiess]

This was my goal. Glad it worked.

[@jvgorkum]

even with the disclaimer at the start i found this explainer good and helpful -- thank you.

[@AndreasSpiess]

You're welcome!

[@lawrencedoliveiro9104]

23:05 In fact, you might say RISC-V deliberately uses older technology in many ways, both to lower design/manufacturing costs and to avoid the potential for patent lawsuits. Even their approach to vector instructions evokes an older way of doing things that dates back to the original machines designed by Seymour Cray, but in this case they may actually be more forward-looking.

[@lloydrmc]

Early microprocessors used microcode. That is, they were essentially RISC internally, and they would translate CISC instructions internally to microcode using something like inline software interpretation. Now that we have graphic cards doing complex calculations strictly in hardware, and many such processes running simultaneously, in parallel; clearly this is no longer the case. Also note Apple OS was internally developed only through OS9. OS X is essentially a GUI running on top of a licensed port of BSD Unix.

[@AndreasSpiess]

Thank you for adding some detail! I did not know the internals of MAC OS because I never owned one :-( And I agree that the first Microprocessors were so simple that we would call it "RISC" from today's perspective. Back then, however, we were proud that they were so versatile ;-)

[@kwinzman]

Good video and full of truth. I liked best how you concisely said that every company wants to commoditize the layer below them. And also if you follow the money you will understand the motivations. I couldn't agree more!

[@AndreasSpiess]

These two points probably are more important than the rest!

[@neithere]

This was far more interesting and useful than I could expect. Thank you so much!

[@AndreasSpiess]

Glad you enjoyed it!

[@rjy8960]

Excellent video, Andreas - thanks! I see a lot of similarities between the state play in the semiconductor industry now regarding theRISC-V architecture and the first LPC2000 Arm devices from Philips (as was) back around the turn of the century. At the time, the fist gen Arm devices offered performance and pricing that was streets ahead of the competition and being based on an architecture that could be licensed by other manufacturers at the time, it was an absolute game-changer and pretty much revolutionised the industry. The only problem was that the common peripherals were all proprietary to the respective manufacturers. I think as it stands, RISC-V has a very big task ahead in destabilising the Arm ecosystem primarily due to cost saving delta and risk. Arm is very cheap to use and very well proven. I think the real opportunity will come about with the ability to synthesise the core AND standard peripherals onto FPGA. FPGA's have always been expensive but costs and performance follows the constant migration to smaller geometries. Maybe lower cost FPGA's will allow semi-custom silicon designed with standard free to license RISC-V cores AND peripherals will allow smaller volume and lower risk devices to be created in house at a more attractive price in the coming years. This I think would be the enabler for a new player - and that will take another industry disruption such as that that Arm created, such as the ability to create low cost devices based on FPGA technology. On a separate point, my QO-100 project is coming on well - 1m dish, Bullseye LNB and SDRPlay RSPdx working well on rx - I have an Ice Cone feed and waiting for delivery of a Kuhne 13cm transverter and some RF cables and I will be QRV soon, so hope to see you on the satellite! de M0SNR

[@AndreasSpiess]

1. I agree with your view about FPGAs. Probably only for special designs. Standard MCU chips are probably cheaper for a long time. 2. My QO-100 installation waits for better weather. It is still in the lab...