First Steps with UVM Part 1

  Рет қаралды 92,785

Doulos Training

Doulos Training

Күн бұрын

Пікірлер: 22
@miklosbence2582
@miklosbence2582 4 жыл бұрын
Terrific explanation! One thing: to avoid confusion you might want to draw attention to the fact that two different things are called here 'parents' - One parent of my_env is the base class uvm_env, the other parent of my_env is the my_test class that brought env to life. Unfortunately they are both called 'parents'.
@DoulosTraining
@DoulosTraining 8 жыл бұрын
You can now run the UVM example shown in this video directly on www.edaplayground.com/x/Wzp
@miklosbence2582
@miklosbence2582 4 жыл бұрын
Hi, you have dut_if, dut_if1 ... Why not use postfixes like _it for 'interface type' and _ii for 'interface instance'? I think dut_ii and dut_it is much easier to follow. Just an oppinion.
@letstalkscience6494
@letstalkscience6494 2 жыл бұрын
Thank you John for this informative and easy to understand video on UVM!!
@nagaprasadd6260
@nagaprasadd6260 6 жыл бұрын
Awesome info... which is very useful for the beginners .. Thank a lot.. looking forward for more informative videos from you John .
@theinterruptedlife1783
@theinterruptedlife1783 Жыл бұрын
For new learners here, we have already imported the uvm package inside of my_pkg, yet when we import my_pkg in top module, we are again importing uvm_pkg eventhough it was imported in my_pkg itself. Why is that? Why not just import my_pkg and call it a day?
@alexandrustireciu832
@alexandrustireciu832 3 жыл бұрын
Why isn't there any build_phase function for the test component? There is one for the environment component, but none for the test component. I am an absolute beginner with SV-UVM, so maybe this is a silly question. Thanks.
@shivamrai2197
@shivamrai2197 3 жыл бұрын
Because build_phase is like "new" keyword in system verilog So you instantiate a subordinate class object in the parent class. Like wise environment is the child class of test, hence build_phase(or "new") is there for it. Hope you got the explaination.
@forestke4868
@forestke4868 5 жыл бұрын
Thank you for making UVM so interesting.
@rameshahparameswaraiah6908
@rameshahparameswaraiah6908 4 жыл бұрын
Explains how a simple "Hello World" example can be implemented in UVM. You get understanding of UVM class based world and module based world of a typical UVM testbench and how they are connected. Good info on uvm_env class, uvm_test class and raising/dropping objections.
@rameshahparameswaraiah6908
@rameshahparameswaraiah6908 4 жыл бұрын
Also has Information on : - where uvm environment object is created and how it is created - typical structure of uvm test class what all it should contain - registration of user defined uvm classes with uvm factory - how to call uvm test from uvm testbench top module
@NoahOliveira-m1k
@NoahOliveira-m1k 5 ай бұрын
great video!
@johnsmith2586
@johnsmith2586 7 жыл бұрын
Why do you need a my_env class? It does nothing.
@SavageBits
@SavageBits 2 жыл бұрын
You don't need my_env for a super simple hello word example. However, you do need my_env for a real world uvm testbench, so it is included in this example for completeness. Check out the part 2 video in this series for better understanding.
@sksameer208
@sksameer208 8 жыл бұрын
Superb John..!!
@sammyizzcool
@sammyizzcool 9 жыл бұрын
Thank u for this informative video
@poojavs8634
@poojavs8634 5 жыл бұрын
Thanks john
@youssefkarmous6227
@youssefkarmous6227 8 жыл бұрын
thank you it was very helpful
@falconFIL
@falconFIL 11 жыл бұрын
Thanks for this video.
@muralihanumanth7368
@muralihanumanth7368 3 жыл бұрын
5:30
@muralihanumanth7368
@muralihanumanth7368 3 жыл бұрын
17:00
@muralihanumanth7368
@muralihanumanth7368 3 жыл бұрын
10:00
First Steps with UVM Part 2
16:03
Doulos Training
Рет қаралды 47 М.
First Steps with UVM Part 3
24:52
Doulos Training
Рет қаралды 37 М.
小天使和小丑太会演了!#小丑#天使#家庭#搞笑
00:25
家庭搞笑日记
Рет қаралды 59 МЛН
啊?就这么水灵灵的穿上了?
00:18
一航1
Рет қаралды 57 МЛН
Easier UVM - The Big Picture
20:39
Doulos Training
Рет қаралды 35 М.
TLM Connections in UVM
25:36
Doulos Training
Рет қаралды 44 М.
The Worst Programming Language Ever - Mark Rendle - NDC Oslo 2021
1:00:41
NDC Conferences
Рет қаралды 1,3 МЛН
Easier UVM  - Sequences
26:46
Doulos Training
Рет қаралды 30 М.
Unleashing SystemVerilog and UVM: Introduction | Synopsys
9:08
Easier UVM - Register Layer
27:54
Doulos Training
Рет қаралды 41 М.
The Value of Source Code
17:46
Philomatics
Рет қаралды 156 М.
Easier UVM - Configuration
30:11
Doulos Training
Рет қаралды 27 М.
UVM-1: UVM Basics | Synopsys
9:11
Synopsys
Рет қаралды 83 М.
Китайцы сделали самый ДЛИННЫЙ ноутбук: Это шутка
0:15
Собиратель новостей
Рет қаралды 1,7 МЛН
Keyboard Cleaning Hack
0:36
IAM
Рет қаралды 9 МЛН
САМЫЙ ДЕШЕВЫЙ iPhone
10:08
itpedia
Рет қаралды 463 М.
Is this Samsung's change over time #shorts
0:13
Si pamerR
Рет қаралды 1,5 МЛН