What Goes On Inside a Semiconductor Wafer Fab

[@Asianometry]

Sign up for the AI and Symposium event and I hope to see you there: www.eventbrite.com/myevent?eid=692838296997

[@gackerman99]

do one in Silicon Valley!

[@Nobe_Oddy]

secret guest?!?!? wait... you're having Dr. Cutress??? LOL Just a guess :)

[@top6ear]

If you want to do a killer podcast do one about the birth and death of Nortel. I use to work there.

[@sedrakpc]

Meet up in New York area one day?

[@DavidHembrow]

Another encouragement to travel during a climate emergency? No thanks.

[@andrewvenor8035]

I have been in the semiconductor industry for 25 years, and I have to say that this video is one of the best layman's explanations of what goes on in the fab I have seen. I'm going to share this with anyone who asks what I do for a living. I also liked the nod to Arthur Miller. 😉

[@millieblack2684]

I want to do HR in this field. Would you be able to share any insight you have on the hiring side from actually working in the space?

[@Chessman27]

I just finished the Nanomanufacturing and Microelectronics program last Friday. I'm currently looking for a company to start my career with. TEL, KLA, Micron, and Wolfspeed were some of the companies that gave us a presentation on what to expect with their company. Do you have any suggestions to be successful in this semiconductor industry?

[@cakesama9770]

Would you be open to an exploratory interview about the industry? I have this one project for this class you contributions would be helpful

[@NealKlein]

I was thinking the same thing. This video is exceptionally easy to follow. I had to revise my original comment because those "Dad jokes" are superb at making certain details stick. Saved to my Favorites.

[@Ansset0]

As a physicist and aviation tech inspector, I have to say: chapeau bas! My deepest respect for translating these processes to the masses.

[@andyargentina7056]

As a baker and father of three, I have to say: Omlette du fromage!

[@bebokRZly]

@@andyargentina7056 As a Dexter Cartoon fan, I have to say: Omlette du fromage

[@Ansset0]

@@bebokRZly Dexter 😁

[@ebx100]

Mais oui!@@andyargentina7056

[@PaulGrayUK]

Aviation inspection I'm sure has some interests that would make a good video if the subject piques Asionometry's interest, which is wide (I know from oil rigs that insurance dictates many standards and QA checks, almost drive things in some industry more than I'd appreciated). Might explain how he manages to work 27 hours a day!

[@alexlefevre3555]

I've watched a lot of videos on top of a lot of my own research as fabs have found themselves so incredibly complex. That being said, this video checked all the boxes and is such an awesome resource of information in one place. A banger as always!

[@brodriguez11000]

Advanced packaging is where some of the next development is going on.

[@JoeMama-di5xo]

i think he likes semiconductors but idk

[@irreview]

We all do.

[@BlckJack123]

Really? I wouldn't have guessed.

[@highbread817]

I like the stocks

[@okman9684]

He lives semiconductor

[@gaussdog]

Semiconometery

[@johnforguites4800]

you've just described most of my working life in 21 and half minutes! Good job!

[@kayakMike1000]

Is it a reasonable job?

[@ntabile]

​@@kayakMike1000If you like wafer fab mfg. , withstand stress as some of us works 12hrs a day, in 3/4 or 4/3 a week, 2-3-2 pattern and willi g to work changing shift, day or night pattern.

[@johnforguites4800]

@@kayakMike1000 pretty much. I found it interesting as an operator, a technician, and as an engineer! The hours can be odd, if you're involved directly in manufacturing. A great deal depends on the culture of the company. My viewpoint is from US semiconductor companies.

[@applesb3507]

​@@johnforguites4800shoveling a lot into a machine and wait for 60 minutes and then shovel it to another machine sure is the funniest job

[@JJRicks]

​​@@ntabileSounds like an Intel shift schedule 👀 I used to be a contractor based in 42. Fun times!

[@SuperCuriousFox]

This was a great video! As an engineer responsible for lithography in our cleanroom, I’d like to add that after exposing photoresist (and usually after performing the post exposure bake) the waters are bathed / sprayed with chemicals called “developers”. Basically like developing photos from camera’s before the digital age. This development is an important factor in controlling the critical dimensions (CD) of patterns in the resist. You’re essentially dissolving part of the resist to open it up for etching after all! Looking forward to future videos about plasma tools, there’s a lot of fascinating physics involved in both deposition and etching.

[@CRneu]

I work in CD-SEM. what's up buddy!? lol

[@DaveKeil]

16:00 - awwwhhh.... you missed the coolest part of that process! It doesn't 'just eventually happen'. It waits until the place is struck with a cosmic ray passing through and igniting the plasma. Yes, we literally set the thing up and wait for the universe to start the process for us.

[@blackmatca6277]

Is that for real? 🤯

[@WilliamStrealy]

No way, do you have a source for this? This might be the coolest semiconductor manufacturing factoid I've ever heard if true.

[@frederikvanstolk5815]

Two minor corrections: * The source and drain are both doped with either n-type or p-type impurities. It is the channel below the gate that gets doped with impurities of the opposite types. * It's pronounced an-isotropic, not anise-o-tropic.

[@JoeLion55]

Came to say the same thing… for an NMOS transistor, both the Source and Drain are doped with N-type dopants, while the body (where the Source and Drain sit, and where the channel is formed) is a P-type well (or more likely the entire substrate is doped to be P-type). In a PMOS transistor, everything is opposite. The body is a large N-well, and the Source and Drain are small P-type implants. The source and drain are always the same doping type, and the gate voltage induces a channel between the S and D of the same type, to complete the circuit

[@simonedigiuseppe1022]

One special mention for the metrology and the defectivity control tools also. Important, if not fundamental throughout all these complex steps!

[@lensmann4002]

Seeing all these steps that go into making a silicon chip makes you realize the marvel a silicon chip really is. Just think of all the silicon chips that over the decades were thrown out and ended up in landfills (broken computers, electronic toys with chips in them, outdated washers and dryers, junk cars with chips to regulate fuel consumption and smog control, etc.) Its like throwing away top of the line Swiss watches.

[@justathinker8669]

Was just thinking the same thing. We should repurpose all those chips and keep using till they die 😂😂😂

[@thorin1045]

we do that every day, the five dollar normal watch you through out instead of changing the battery is as good as those swiss watches, just not made by hand and plastered with brand names to make them worth thousand times more than they are actually worth.

[@lensmann4002]

I must politely correct you on one point, I do indeed replace the batteries on my watches when needed. I believe in keeping a watch until the coil goes bad, and the cost of repair exceeds the value of said timepiece.@@thorin1045

[@ColonelKlinck]

This channel deserves subscribers in the millions. It really is incredible content.

[@Gameboygenius]

It'll come. He's halfway there.

[@Padoinky]

This is an excellent tutorial on what is a hugely complex process in an even more complex industry

[@popquizzz]

I would love to see a video on the next step in the process, the science and application of packaging, testing, and binning.

[@titusjames4912]

Came across your channel maybe 2 years ago. I am now working in tool installation at a big semiconductor company in the US. My hope is to go to college and one day learn how to use the factories I am helping to build. The more information I have the more valuable I become. For someone who has been a little too specialized in the industry this all around video is very helpful. Thank you so much!!!

[@drewmqn]

I'm in awe at the complexity and precision of the processes presented. Just a slight change in presentation style and I would easily think this was all sci-fi techno babble.

[@PeculiarNotions]

I always appreciate that you got jokes. Even if you did the whole video for that joke at the start, it'd be worth it, and I'd watch the whole thing.

[@sapiosuicide1552]

Amazing channel. I'm liking the humor you're starting to introduce as well, makes it even more engaging and enjoyable to watch, almost reminds me of Patrick Boyle with his mixture of dry humor and legit analysis of a complex topic

[@oakbeck]

Great video, it’s difficult to cover the full scale of a fab in a short video, but you did a nice job. One minor correction at 17:32. A planar MOSFET drain and source will both be doped the same (N or P type), not differently, while the channel will have the opposite doping. When voltage is applied to the gate an inversion layer is created in the channel that allows the FET to conduct.

[@Danji_Coppersmoke]

Thanks for info. Source, Drain = same dope (P or N). Under gate = opposite dope (N or P)

[@leonidasg2257]

Yea I was surprised with that too, first lesson into mosfets and our professor told us a MOSFET is a symmetrical device and the Source and Drain depends on the voltages we apply (contrary to a BJT trasistors which is totally an assumetricla device and has to be connected in a specific way).

[@unexpecteditem7919]

Finally a full explanation that isn't a really vague marketing video, or shitty voiceover read from Wikipedia. This is ace!

[@selewachm]

We retired to Lincoln, TX from the Houston area. North of Austin is a town named Taylor. We were coming back home after going to Austin and south of Taylor I noticed a huge construction project. Dozens of cranes, building the size of a couple Amazon distribution centers. Got home and checked Google Maps. Well the photo still showed farmland but there was pin for "Samsung". They're in the process of building a fab there. Then driving SE I noticed a pipeline being built. Turns out water rights were purchased from ranchers, etc 50 miles east and they'll be pumping it to Austin/Taylor area. Fabs require huge amounts of water. Oh, and we're in extreme drought.

[@TAP7a]

It beggars belief that fabs were even permitted to be considered in places like Texas and Arizona. Like I'm sure the tax situation isn't as unnecessarily favourable in, say Michigan, Ireland, Scotland, Denmark, Ottawa or anywhere on South Island NZ, but all of those other places have water, energy, educated populations and government support out the wazoo, why are the most geographically insane locations being considered over these intuitively easier ones? Is it exclusively tax breaks?

[@ntabile]

@TAP7a Yeah, why then that these 2 states were favored to have those new fabs build over there?

[@Joe_VanCleave]

@@ntabile Tax breaks as inducements for building a fab in a state are a major reason, along with an educated workforce.

[@DavidHalko]

⁠@@TAP7a- Austin Texas had fabs there, for decades. People build fabs where existing workforce exists, so one does not need to import educated workforce from all over the place (very expensive.) Education is important, so is experience. A child growing up, hearing the war stories from their parents of early clean rooms, will have likely received a substantial informal education base that is intangibly important while layering on new technologies.

[@coyotebebop3984]

I appreciate the balance of informative and entertaining you're striking with videos like this one, explaining otherwise complex processes while still staying true to the science. Being a former drama nerd, I also had a good laugh at your Crucible joke!

[@ChiefWiggum-f5t]

Love the videos! As a Manufacturing Tech, this video is as accurate as it gets. Manufacturing CPUs is an increasingly tough and expensive task.

[@nickj2508]

very good. Note: 9:10, 16:56 more so Orbotech that was merged by KLA, 9:37 for advanced nodes Quartz or other even more lower expansion glass is used.

[@OzMat]

Someone was always going to point out the obvious.

[@nickj2508]

@@OzMat Someone was always going to make an annoying replay

[@OzMat]

@nickj2508 Yes. My attempt at humour was poorly written. I have a lot of respect and admiration for anyone who has the intellect to understand the whole Semiconductor bizzo. So mate, from a construction worker in Australia, have a good day. 👍

[@guyguy463]

You sorta glossed over Metrology. You should really do a separate video in that. They do some pretty crazy stuff to make sure the tools are running on-target and that the layers are built properly

[@punditgi]

Amazing channel with top notch videos. Always learn a ton every time. We sure appreciate chips a lot more than most of us used to. 😊🎉

[@13minutestomidnight]

Thankyou so much for this. I know nothing about semiconductors and this was a great overview of their manufacturing that was straightforward and easy to understand even for someone like me. Awesome job.

[@unreliablenarrator6649]

You missed: wafer ingot growing, sawing, polishing & doping (other than SiO2 growth); annealing is not merely "repair", more importantly it is recrystallization to improve bulk properties; many significant tool vendors (significantly non-Japanese) were omitted but points for including SMEE (I guess a profilenof them is coming).

[@DaveKeil]

2:56 - an image made through lithography is called a lithograph. I believe you'd want to say *... The lithographed image ....". But, really, I'm sure everyone gets it. Worked in a HBT GaAs Fab 20 years ago, this series is very nostalgic for me. Keep up the good work.

[@alainpannetier2543]

Lithography is the result of applying an inked stone matrix on a sheet of paper or similar. Then you also have xylography if the matrix is made of wood, or chalcography if the etched matrix is a copper plate. So maybe we need a word like phanography if the etching medium is a type of lamp.

[@DaveKeil]

Good point. Photolithographed then?

[@alainpannetier2543]

@@DaveKeil sounds good. Where is the stone though (Gr: lithos)?

[@DaveKeil]

@@alainpannetier2543 - Huh. Never thought about it before, but the reticles are made of Quartz (if I recall right, or were) so they're in the stepper. Damn, maybe the whole thing isn't just some weird unfathomable naming convention the industry latched on to and ran with!

[@mekky3504]

Wake up babe new Asianometry video dropped

[@tommy2cents492]

Nice! What you missed... or deliberately omitted since technically it does not contribute directly to the manufactoring process... is metrology. Many wafers are partially measured to ensure that the dufferent layers stack up like straight buildings, and all patterns have the same size. Several control loops are present to optimize quality (e.g expressed as the final number of yielding dies). The holes in the floor are to ensure a net downflow to prevent particles from swirling around. That's also the reason that running in a fab is not allowed...!

[@techman2553]

I've watched a lot of your videos and absolutely love them ! I've listened to you describe the countless cutting edge processing steps that pushes the boundary of our ability to understand and manipulate physics, and it all makes logical sense. But for the life of me, there is still one processing step that I just can't wrap my brain around: The saw. How on earth do they precisely saw the ingots into wafers and how are the chips precisely cut out of the wafer ?? - It's seems like such a simple thing in concept, but I just can't imagine how it is done with such precision. It would interesting to hear about that piece of the puzzle, the equipment that is used, who manufactures the equipment, etc. Is it challenging, or is it pretty straight forward ?

[@mikechaplin1566]

I'm not sure about how wafers are sawed from the ingot, but the chips are cut out of the wafer using a laser, historically a saw was used, but laser is a more recent development.

[@Mueller3D]

It's not the case that ingots are sawed right into perfect wafers. After being cut, the wafers are lapped and then polished. In fact, there are typically several polishing steps that take place during IC production. That's because the removal of material during lithography and etching creates uneven surfaces, but later lithography steps require a smooth flat surface, so the wafer must be "re-planarized" at various points. As far as separating the wafer into chips, there are different methods: scribing and breaking, sawing, or laser-cutting.

[@rondobrondo]

I know all of these semiconductor topics you cover are generally extremely complex and advanced, but plasma etching is another one for these 'tertiary' technologies that is still just mind-blowing to behold

[@adamh1228]

wow. that "standing wave effect" shot and section is stunning!

[@DaveKeil]

21:20 - no subvia? No Rel and PCM test? No dicing? Man... those guys always get left out of the story. Great work! Excellent video.

[@ralanham76]

He has A LOT of videos on ic. kzbin.info/aero/PLKtxx9TnH76QY5FjmO3NaUkVJvTPN9Vmg

[@ZeLoShady]

Somebody works in dicing

[@Evergreen64]

With all the expensive equipment involved at each step of the process, it's a wonder that most complex chips are really quite cheap when you think about it.

[@KarrasBastomi]

The beauty of economic of scale.

[@ducphamminh4691]

2:35 When the cake shown up, I chuckled a little bit. That was the exact comparison I used while training new physical design engineers, on how to imagine what a chip would look like.

[@DaveKeil]

15:16 - we used to pronounce that an-iso-tropic, because it's the opposite of isotropic. The world may have changed in 2 decades, but thought I'd mention it

[@robert-wr9xt]

This is the most informative a KZbin channel in existence. Share with your children or nieces and nephews. This IS THE FUTURE!

[@DaveKeil]

9:15 - yeah, at some point we lost the somewhat important point that it's called photolithography, and it's colloquially abbreviated to just lithography, or litho. The IC industry, and fabs especially, abrev everything. After I left Nortel HPOCS, where I made GaAs SAGFETS and HBTs in as a sustaining engineer for tfdep and litho, it took a few months to sort out a good answer to the question 'what did you do there' in a way that someone who didn't work with me could understand.

[@alainpannetier2543]

Lithography is a word but it has to do with a _stone_ matrix. Then you also have xylography if the matrix is made of wood, or chalcography if the etched matrix is a copper plate. So maybe we need a word like phanography if the etching medium is a type of lamp.

[@colinstu]

15:28 I love how that's running Win 3.1x or NT 3.x

[@ciCCapROSTi]

Dude I'm working for ASML (second hand) and I learned more from your videos over time than from their teaching vids. I can basically bill watching your vids as work.

[@uwezimmermann5427]

As usual a highly educative video and a nice summary in a humorous way. However, there are some errors in the video which make me hesitant to recommend it to my students. Among other things the source and drain in a given transistor have the same type of doping - it is the channel which has the opposite doping.

[@peterpepper1995]

Excellent video as always!

[@sirmingusdewiv8325]

So you watched a 21min video in 3min?

[@anthonycleveland1514]

Nothing more exciting than a new Asianometry video

[@Blubb5000]

Last week I decided to start to make my own chips. I think I’m going to hold back with this plan for a little bit. After this video, I think I have to do a little more research. 🤷🏻‍♂️

[@cvonp]

Huge respect for TSMC and Taiwan in general. I was very fortunate to travel there twice as a Singapore-based AE for Chartered Semiconductor in the early 90s. Someday I hope to return and see more than just greater Taipei 😉

[@senefelder]

You should do a video about metal organic chemical vapor deposition

[@badrinair]

thank you much for the video. i had to go back and forth many times to keep up with the information flow. Making the entry free for the Symposium shows good intentions. WIsh I was in taipei, unfortunately I am very far away in IRL .

[@41chemist19]

I think he was hungry when writing this script. A solid third of the run time is junk food analogies. Great video as always

[@tykjpelk]

I just gave a talk covering the same stuff and barely managed to squeeze it into an hour, how can you do 20 minutes? I'm amazed.

[@JigilJigil]

19:14 There is no Varian anymore, they are not a player in semicondcutor industry anymore, Applied Materials bought their ion implantation technology 12 years ago, Varian was splited into three companies in late 90s, Varian, Inc. (scientific instruments - acquired by Agilent Technologies), Varian Semiconductor. (acquired by Applied Materials) and Varian Medical Systems (they make radiation therapy hardware and software as an independent company within Siemens).

[@DB-xx6gq]

Love your videos. Keep up great work. Few suggestions on lithography part of this video. 1. You forgot to mention developer step. 2. Post expose bake and hard bake are 2 separate bake steps separated by develop step. I know you were trying to keep this video simple but these are important and you go into much more detail in other manufacturing areas. Thanks again for all you do

[@DaveKeil]

4:19 we also used electroplating and sputtering, but they may just not be in vouge now. Sputtering uses the migration of a plasma, so I think it's gets thrown into PVD a lot but technically it isn't.

[@xxportalxx.]

Sputtering IS technically pvd, the same as how epi IS technically cvd. In a fab they get separated so that you can split up sections (and therefor workloads), as well as by product workflow (for instance often you'll have wet etch machines thrown into diffusion or epi areas, or diffusion machines thrown in with implant, etc.)

[@sirmingusdewiv8325]

You make a conductor, then cut it in half.

[@carlcrawford161]

I have been watching your videos since 2018. This really bought together many different concepts from past videos, I was able to understand everything in this video. Thank you.

[@jairo8746]

When i saw the title i thought you finally got invited for a TSMC tour.

[@sidewinder3422]

As a Software Developer, I can't imagine the level of complexity that goes into all the software in the entire semiconductor process, I'm probably too dumb for that lol.

[@nneeerrrd]

0:41 you better blur your face if you prefer to stay incognito LOL 😆

[@hollywoodjim]

I watch your channel to make me feel smart. If I went to that event I would be the dumbest person in that entire pavilion 😮

[@mythmakinglife]

Очень крутые обзоры на тему микроэлектроники. Но в этом видео вроде как не хватает 2-х операций: CMPlanarization и Electroplating. Хотя я не знаю, может в современных передовых процессах они уже не используются, я не знаю) В целом очень хорошо и ясно получилось. Спасибо, что находите время делать эти обзоры. Очень интересно смотреть)

[@MrNobody-bv4ec]

I randomly stumbled onto your channel and have been hooked ever since. I know so little about most of what you cover but you do so well in breaking everything down and the topics themselves are interesting and it's not stuff i'd ever expect to be interested in! Keep up the great work!

[@LordMarcus]

We, all of humanity, rely on these processes for literally everything now and holy shit this is fucking insane.

[@rikkey3k]

Great Video ! I'd like to also see the equipment used to test the wafers.

[@brothergrimaldus3836]

15:00 "...but here it creates a loss of resolution, and sadness for the customer." I don't know why I found that so funny, but I almost dropped my phone.

[@MrHav1k]

It's a miracle after all these steps the end products not only operate, but do so on a consistent enough basis to be relatively cheap and profitable!! Looks like several subsequent miracles are needed to make this all work.

[@adambalapatel]

i hope you know there’s a group of fashion obsessed gen z kids who religiously watch and discuss your videos

[@safes9571]

Here for that, I may not understand everything about semiconductors but it really peeks my interest how tiny ass chips work

[@Gameboygenius]

Waaaait... Care to elaborate?

[@adambalapatel]

@@Gameboygenius so, like 12, 18-25 y/o fashion entrepreneurs/executives/designers and students have a group chat where we religiously talk about the videos it’s so much fun

[@Gameboygenius]

@@adambalapatel I'm surprised but glad to hear that. Makes me think there's hope for this world.

[@adambalapatel]

@@Gameboygenius lmao we’re just silly little guys having silly little fun

[@jaqueitch]

Best technology channel, hands down

[@bedhedd]

Wow the animations/visuals were great for this video

[@LPWide80]

Hope we see that ALD video soon!

[@chyldstudios]

You make the best videos!

[@dianapennepacker6854]

Joke went over my head... Can someone let me into the loop? Damn reminds me of the old fridge prank call joke.

[@WormBurger]

Wish I could come.... I'm in Canada. The part that is on fire.

[@brodriguez11000]

Send some wafers up that need some thermal oxidation.

[@roswellmundwiler7893]

Also, you mentioned metrology. Thank you for that.

[@pedro_marques92]

i'll try here in my garage

[@PaulGrayUK]

Monty Python warned about this joke, luckily people survived and didn't die laughing, close call.

[@timwildauer5063]

I’m interested in how they keep the wafers aligned through all these steps. When there’s more than one mask, you have to line them up perfectly every single time, within the width of a few atoms.

[@fredinit]

Very similarly to how they align printing plates... there are registration marks placed in the mask that are transferred along with the rest of the image. Those registration marks can then be used by downstream processes to ensure things are lined up.

[@andersjjensen]

Yeah, I somehow don't think just putting a scribe line, with a very pointy pencil, somewhere on the edge will do the trick...

[@nickj2508]

There is an industry segment of machines whose sole purpose is to verify overlay alignment after subsequent layers. Including KLA Archer systems and ASML Yeildstar. That's right ASML makes a machine to verify overlay alignment of its lithography machine. Photomasks have several fiducials that are in and outside of the printed pattern area. for chips, sometimes native features can be used for certain alignments. ASML also has to map the topography of the mask before it "lithos" the mask to ensure the projected image is in focus.

[@KevinNguyen-zn4vv]

Interesting. It makes sense for a lamina flow filtration system with dual filtration in an enclosed space.

[@Anolaana]

I'm glad I watched this during my dinner, with all the food analogies!

[@classiclibertarian]

I love this channel. The depth of your research is impressive. Thank you for your hard work!

[@KieranFoot]

I love your videos, great content, and well delivered.

[@ThoughtsEtcEtcEtc]

If the pizza analogy is so deep, then firms should look for students and engineers from Yale because New Haven, Connecticut has the best apizza in the world. It is called Apizza (ahBEETZ) and as stated, it is the best pizza in the world.

[@RangiferADV]

Was surprised you didn't touch on the industry leading Rockwell Automation Retro Encabulator!

[@johnjacobjinglehimerschmid3555]

Another great video for those not familiar with the industry. Nice work!

[@jamesfrancom8100]

Nice job, great detail, thanks for doing this video.

[@ramdasprasad3792]

@Asianometry thank u for the great video. I noticed at 17:39 you mention the drain and source of the FET you drew as two different material types...was this intentional? the drain and source of a FET must always be both p or n type. A diode might have been a better example for what your were trying to explain. Otherwise greatly informative video. Thank you for the amazing content😊

[@DerekWoolverton]

So, actually in the MOS transistor you diagram, the source and drain are both one type of region (say n-type), and the area under the insulator is the other type (p-type). This gives you an n-p-n transistor. A device with just a p-type region and a n-type region would be a diode. Back in the 80s our college actually had a freshman lab where we were able to fabricate chips ourselves, doing all the steps outlined (at a very crude scale), making a handful of transistors on fingernail sized wafer fragment.

[@DavidHalko]

RIT?

[@DerekWoolverton]

@@DavidHalko CIT.

[@DavidHalko]

@@DerekWoolverton - I was amazed at the clean rooms in RIT… and how the facility floated on its own elastic foundation!

[@sujairamprasathc]

0:00 - Intro 0:30 - Ad 1:39 - Beginnings 2:28 - The Process Cycle 3:49 - Adding Layers (Oxidation & Deposition) 4:18 - Thermal Oxidation 5:15 - Deposition 5:41 - Epitaxy 6:19 - Physical Vapor Deposition 7:48 - Chemical Vapor Deposition 9:12 - Lithography 10:05 - Photoresist 11:37 - Exposure Tool 12:12 - Post-Exposure 13:16 - Etching 13:54 - Two types of etching 16:59 - Impurity Doping 17:58 - Doping & Ion Implantation 19:19 - Fab Layouts 20:40 - Conclusion

[@dumi08]

and you didn't even start on the packaging, that is as an art on itself

[@vincentvirux9152]

15:14 my kind sir, Anisotropic as in AN-iso-tropic not a-nee-so-tropic. like an-ion, and ion

[@msimon6808]

Not ==> ankee-so-tropic AN-iso-tropic

[@pdelong42]

~@20:00 - The description of the bays sounds very analogous to the way a datacenter is structured. Lots of provisions for the supporting infrastructure beneath the floors (and the ceiling as well, at-least in the case of datacenters).

[@pdelong42]

Also, the weird mix of metric and imperial units you mention also reminds me of the unit David Mermin conjured for his special relativity pedagogy. He uses 1 foot-per-nanosecond as a decent approximation for the speed of light. It works, I guess, but it's super weird (in much the same way that people decried television: what good can possibly come from something that's named using Greek and Roman word-roots mashed together, they said). Anyway, I digress...

[@OranCollins]

event sound fun! hope people have fun! love the super detailed look into semiconductors love the content. keep up the great work!

[@largezo7567]

The ALD needs a video of its own

[@video99couk]

1:32 Is the carpet supposed to look like that?! 10:52 I remember suck-back on CGA wafer tracks back in the 1980s. Occasionally they would still dribble.

[@huyked]

If mankind ever experiences a catastrophic event where this technology is lost, I think this tech could be lost forever. The collective knowledge that led to this technology is mind-boggling. This makes me think, perhaps mankind has lost technology through some past catastrophe.

[@kazedcat]

We do but mostly it is some form of witch brew that does something useful in the past. Microchip fabrication is in another level of complexity comparable to summoning the demon to do something for you.

[@OzMat]

Mankind and more specifically China has already experienced this catastrophic event. It or he was called Mao Zedong and his preferred tool for mass destruction was Communism. The Great Leap Forward, the Cultural Revolution, and the 100 Flowers Movement, between them claimed up to 80 million lives. Mao specifically had intellectuals killed or any person who demonstrated the ability or will for free or independent thinking. I dare say anyone or the type of person who watches this youtube channel would had little hope of survival in Mao times. I often compare Taiwan with it's 26,000,000 population and Communist China and its 1.4 Billion people. Taiwan os so far ahead of China in the technological level. It seems to me that mankind would be so much more advanced than what we are at present but for the likes of Mao, Stalin, Hitler and their likes. First rule of taking over a country, kill or imprison the intellectuals.

[@eedobee]

@@OzMatwhen I consider how far Taiwan, South Korea, Hong Kong and Singapore have come, and imaging a world where China was that advanced, it really does make you wonder. If China was as developed as her smaller siblings, the world would be so wonderful. It hurts to think about.

[@OzMat]

@@eedobee A very apt comparison, the 80 million chinese people killed due to the CCP insanity is a tragedy and a terrible loss for humanity.

[@rollinwithunclepete824]

A really informative video, Jon! Thank you

[@alphar9539]

Superb overview

[@buixote]

Don't know if you were planning on covering the pollution and water use in a separate video. Silicon Valley found out the hard way that this is not a "clean industry"; despite the "clean rooms".