Carry Look Ahead Adder (CLA) Explained

[@ALLABOUTELECTRONICS]

For more information, check Digital Electronics (Playlist): kzbin.info/aero/PLwjK_iyK4LLBC_so3odA64E2MLgIRKafl Timestamps: 0:00 Limitation of Ripple Carry Adder 2:00 Carry Generation and Carry Propagation logic in CLA 4:40 Carry Look Ahead logic for 4-bit Adder 10:28 Delay Comparison between Ripple Carry Adder and Carry Look Ahead Adder 13:30 Limitations of Carry Look Ahead Adder 14:52 16-bit Adder using 4-bit CLA blocks

[@poojakhanna6942]

This tutorial explains it better than any other one I have watched. Thank you so much for the tutorial.

[@anushkasaxena590]

I'm honestly so so so grateful to this channel and this person! You not just made me score good in exams but made me understand the deep meaning of concepts. Thank you very much, truly grateful to you!

[@shivaram6991]

my soul left my body after trying to analyse the last circuit design

[@Motion-Studio]

mine alsooooo

[@Miss.cat79]

Fr 😳🥲

[@mohammedyusuff8081]

Mine is losing right now.

[@HogenkampNick]

10:28 Gx and Px should be switched in the Carry Look Ahead Logic Circuit block.

[@DhrithikRaj]

Yes. Thanks for this!

[@jackey-mill3634]

Yeahp

[@harshakontham4534]

Yes

[@awaviarybangalore]

Complexity explained in the flow of water, hats off sir.

[@Stevensmith30247]

Very Perfect Explanation for the CLA

[@trunghieule758]

Everything is fully explained. Thank you!

[@kalebm1279]

I am literally in love with you now I can finish my homework

[@YoannaGicheva]

So smoothly presented! Thank you!

[@vincecs]

This was an amazing explanation👍

[@Ansari-go5dr]

Straight to point explanation... Go ahead sir🥳

[@NightVisixn]

Very good tutorial man, thanks for the video

[@mayurshah9131]

Always enjoying your posts

[@meanpillscasper]

Fantastic explanation, thanks!

[@theawes0me0ne]

Thank you very much, i finally understand the gate logic behind CLA adders. Been trying to learn the gates to make a faster binary adder in a game.

[@PalashKantiKundu]

Beautifully explained.

[@urmilareddy6047]

Wonderful explaination....🔥🔥🔥

[@nverkhachoyan]

Amazing video! Thank you so much

[@mohammedsameer3012]

time 10:23 in the video there is mistake that is you took P as carry insted of sum. specifically in P1, P2,.....

[@KandhanM-n1o]

the last circuit for CLA is bit complicated to understand for me can you please explain it

[@ZAccess-i5y]

I hope you can explain the last two-level carry-lookahead.

[@omarsamy1144]

you are amazing but try working on your accent, and trust me you will get way more views,Thank you for your hard work spreading knowledge.

[@uyioduware693]

Is it not supposed to be 3 gate delays, because it waits for 3 parallel gates before it's passed to the final gate for implementation. Like the 3 parallel gates are delaying the calculation in the final gate.

[@lymtics88]

I'm confused cuz on Harris&Harris textbook, Propagation is A+B(i.e. A or B) but not A xor B, why is that?

[@rafikfarhane713]

whats about the delay in the last clag ?

[@akshithlyrics2504]

Sir can you explain me about gate delay . Why it is 1 gate delay & 2 gate delay ?

[@김승환-g3c]

I am having very informative time to listen your lecture but I cannot lie that I haven't noticed your intonation. Are u indian robot? I am sorry If this offends you. I love your contents!!

[@Mo__Ga]

Also immediately noticed, the way sentences are always ended on a low pitch along with the strange pauses in between reminds me of early text to speech.

[@TheRojo387]

So synchronous carry is actually carry lookahead…

[@maximekahn]

Which adder is currently implemented in the industry?

[@jacks6910]

Both

[@jacks6910]

The benefits and drawbacks to each both have a place for specific tasks.

[@williambaltus3754]

My village is so back

[@RanokFerdous]

awesome