DDR5 vs DDR4

Practical demonstration of dual rank and single rank memory configuration differences DDR4.
• Practical demonstratio...
The differences between X16 X8 and X4 DDR4 memory chips explained quickly.
• The differences betwee...
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[@ActuallyHardcoreOverclocking]

Practical demonstration of dual rank and single rank memory configuration differences DDR4. kzbin.info/www/bejne/Z4vFqYCeat2Ihck The differences between X16 X8 and X4 DDR4 memory chips explained quickly. kzbin.info/www/bejne/rWPFd62HibZsl6s

[@andrewryder3075]

Good explanation! You bring up an interesting point regarding the latency differences between DDR4 and DDR5 - (i.e., DDR5 has greater throughput, but DDR4 will do single reads faster). Bear in mind though that, as CPU tech continues to evolve, more and more of the smaller reads you're referring to will be relegated to cache (whereas large tables/blocks would still take up too much of it). Compilers are already starting to take advantage of this evolution, so that, as new apps are introduced (and older ones get updated for modern architectures) we'll see a greater and greater performance advantage to DDR5.

[@rainerzufall9881]

Thanks for sharing so much information about DDR5. It might be important for me if I decided to upgrade one day (which is likely going to be in the later DDR5 era). I found that there was a general lack of information out there on how DDR5 really works and what the differences are. Glad to see you filled this hole.

[@rarerubber]

NICE AWES0ME KEEP_IT_UP! ✨🎉✨🎉✨🎉🎉🎎🎭🎎🎭🎎🎭🎗🎗🎗🎗🎗🎗🎗🎑🎑🎑🎑🎑🎑🎑✨🎆🎆🎆🎆🎆🎆🎀🎀🎀🎀

[@10ghznetburst]

Very well explained as usual, a few minor things: Advantages of multi-rank is not just having more banks but also the timings for different-rank are shorter than same-rank, on top of being able to initiate RFC on one rank while the other is active. None of these advantages benefit substantially from more than 2 ranks. The reason 512 bit bursts are preferred (64 bytes) is because the cache lines on most processors are 64 bytes, so the minimum granularity in caches is 64 bytes, when you fetch data from main memory and cache it, it will always be a 64 byte cache line. Maintaining efficient use of the cache was one of the reasons 64 byte bursts were retained in DDR5, because otherwise you use 2 cache lines for every memory access you do. Re: Chaining CCD/RDRD sequences, you are basically only limited by FAW and REFI, but basically you can in theory get close to saturating the data bus off just a few banks.

[@Airwave2k2]

So we need to get memory manufacturer to explicitly market how many bank groups they have and reviewers to also tell them apart and give glory to these that do it from a consumer perspective.

[@QuantumConundrum]

Are there any easy heuristics to realistically use on amazon/etc.? I haven't looked at ddr5 for myself yet but I feel like referring to the manufacturing spec sheet is the only way... which sucks.

[@Airwave2k2]

@@QuantumConundrum not that I'm aware of. The manufacturing spec sheet is not readly available. If I'm correct there is even enough wiggle room to even have the same frequence and timings advertised and changed ranks under the hood, as it is wide used with which chips are used. That is why people chase for b-die and so on. RAM is a mess from a consumer perspective like the phase count and the M.2 situation where it is attached to and what shares which other ports.

[@TheDoomerBlox]

9:50 - Hopefully he will remember to link some of them below the video, indeed . . .

[@Thomas_Aslaksen]

Thank you so much for this excellent explanation on this topic. Finally I think I get the timings when it comes to memory. And I now also understand why DDR5 is so much better than DDR4. It's not only the speed, but how it reads. Thank's for the unbelievable good work you do BZ.

[@denvera1g1]

Cosmic ray data corruption within RAM is actually more common than you'd think, and on die memory correction should alleviate 99.9% of them, because most of the time you're only going to get 1 within the space of a single machine. However, as these memory wells get smaller and closer together, you're more likely to get multi-bit corruption from a single event.

[@Lemard77]

what is the frequency of those events?

[@denvera1g1]

@@Lemard77 REALLY common, it just depends if there is a computer in the path It has affected election outcomes before

[@taiiat0]

​@@Lemard77 we're constantly being bombarded with high Energy Particles, of various types. but the Planet is big, so the probability of something hitting specifically your Computer is relatively low. Neutrinos are the big one, as they do not come into contact with Matter, so they pass straight through the entire Planet and everything on it, as it nothing was there. flies right through us at a high fraction of the Speed of Light. but they can still affect Electrical Signals.

[@swisstraeng]

@@Lemard77 If you want an extremely rough idea about how often? It depends on a lot of factors like your geographical location and all of that. But you can expect having 1 bit flip every day. Depending where you live you may get one every hour or every week. And that can cause BSOD or whatever you don't want to have. Which is why servers all use ECC memory to be "immune" to this. But for consumer hardware, not having ECC means you need one less chip of ram storage (8 vs 9 chips) which makes cheaper ram. And since consumers will blame it's the gods' fault when their PC BSOD, it's not worth the extra money. DDR5 will basically reduce these bit flips from daily to yearly. Because DDR5 memory is not completely ECC, but the most affected parts of it are. And TBH it's really time we finally have ECC for consumer hardware.

[@makuru.42]

@@swisstraeng but I think the reason every chip has ecc because we have so high clock speeds in such small packages that it's inevitable and decided it's necessary and probably so you don't need to make DDR6 or DDR5+ or whatever in a few years, also funnily ECC is good for over locking (oc) to, it gives a lot of advantages firstly ECC / Server RAM, more data is open, like what ram chip is used, it's most of the time under clocked for some reason and if all else is equal you can push it high especially the timings because a single error and even double errors gets corrected if it didn't quite come through, at the cost of latency of course + your OS can log un/correctable errors so you can fine tune it a bit more.

[@FabulousFunkyFingers]

19:52 DDR4 and DDR5 both return 512-bit bursts because a x86-64 CPU cache line is usually 64 bytes. When a CPU reads even just one byte, it gets it from the cache, and each entry in the cache (i.e. a cache line) is 64 bytes. When the cache doesn’t have the data, it asks the memory controller to fetch a whole cache line. This may seem like overkill just to read one byte, but a program will need other things in the same cache line more often than not.

[@Lokotraktor]

Wow, great video! This is exactly why I go to this channel. Learn stuff and hearing about ideas, tools and terminology to google up further

[@fracturedlife1393]

Informative. Mostly above my head but i'm trying.

[@0vers33r1]

Same here 😂

[@benjaminoechsli1941]

Definitely going to give it a rewatch soon. It'll click eventually!

[@puokki6225]

8GB x16 DDR5 sticks seems to be at least somewhat common in laptops currently, although based on Jarrod's Tech's benchmarks the performance difference is barely noticable compared to DDR4, which would make sense.

[@jakeq.tobias5291]

Very nice work on this one. I'm pretty sure this is one of those that will keep being used as a reference for many years to come.

[@Oraceon]

So, as somebody who less knowledgeable in the field of memory, would it be safe to say for the "common folk" PC enthusiast, sticking with a high end kit of 2x16 ddr5 would be a safe option?

[@kuyans3889]

BZ says that dual rank (2x32 DDR5 is dual rank) memory doesn't offer as much performance uplift as dual rank DDR4 does, so there's less of a downside to buying single rank 2x16 DDR5 sticks. Not that buying double the memory for a less than 10% increase was ever a good decision. But yeah 2x16 is a good choice if you don't need 64GB of memory.

[@penguinton7691]

Some of the changes they made seem pretty common sense. Shorter traces good.

[@crispysilicon]

Great content with clear explanations.

[@nathangamble125]

Nanya makes 8Gb DDR5 chips. Or they at least include an 8Gb chip in their list of DDR5 ICs, and they list a few different modules which use them on their list of DDR5 DIMMs - in fact, right now they don't seem to list any DDR5 modules which don't use those 8Gb chips. I'm not sure whether they're making them in significant volume though.

[@ClockWorkJake]

Well Done BZ. While I know you're here because you love to overclock, I'm hoping at some point you'll love teaching others how to Overclock as much as you enjoy the act itself. I know as a golf professional (former, unfortunately), I actually reached a point where the personal rewards I got from helping others get better outsized anything I could ever do on the course personally. There's something about helping someone get better at the very same thing you are passionate about, & watching them experience the same joys you had when you were first trodding the path, that is hard to describe, but singularly unique. I do sincerely hope at some point your experience of this phenomena is similar to mine enough that the joy you get from showing others the path is greater than they joy you get from walking it. You clearly put a great deal of effort into this one, It shows. & I for one, appreciate it a great deal. Cheers. (Edit: Bob Dylan said it best. "You're gonna have to serve somebody". & he was dead correct. That being the case, it might as well be helping people learn the thing that you worked so hard to learn yourself. With any luck, a few of them may share the same enthusiasm as you, just don't be disappointed or bitter when everybody doesn't. Most of us humans are fucking swine)

[@Boria0]

"This explanation isn't particularly easy to follow" This is rich, coming from you 😅

[@heavymetalmixer91]

Great video, dude. I can't deny I got lost on some parts but still better than the whole video LOL

[@RinMinase]

I'd like a buildzoid episode on rambling educationally about how the not on-die type of ECC actually works. 😁

[@russkubes]

I'm also curious what happens when the ECC data is bad. In his example, it tried to store 5, but stored 4, but the ECC data was actually able to correct it. But what happens if you send 5, it stores 5, but the ECC data that gets stored makes it look like it shouldn't be 5.

[@RinMinase]

Similarly I'm also curious as to what happens when the ECC bits are the ones that get corrupted. Or does it even get corrupted at all?

[@dmanatunga]

@@RinMinase ​ @Russ Kubes It is possible that the ECC code is what gets corrupted, whether it be through alpha partickets, component issues, transient faults, etc. Typically, these ECC schemes are generated such that any bit error, whether it is in the original data or the ECC code, can be identified and fixed. A common type of ECC in DRAM is SECDED, which can do Single Error Correction, Double Error Detection. With this scheme, there is an algorithm you go through to identify the location of the bit error. If you see the location is in the data, you can flip that bit to do the correction. If the location says it is in the code, then you don't really have to do anything.

[@insu_na]

I actually understand and learn from your words, magic man

[@denvera1g1]

Very interesting and enlightening. i have no idea what i'm doing with overclocking RAM on AMD or intel. I did no research and was just lucky on my first try (took a few days) on a 5700G getting 1:1:1 timings going from 4400CL19-19-19-39, up to 4933 CL17-17-17-30 with ~73GB/s at 54ns(i cant find the screen shot of 4933 CL17-17-17-28 with improved sub timings hitting close to 74GB/s 49.1ns) Going to definately try raising TRFc instead of lowering it I know people are going to ask, yes the UCLK/MCLK/UCLK are all at 2466Mhz, Ryzen APUs use TSMC 7nm memory controllers, where as Ryzen CPUs use GloFo 12nm memory controllers which can only hit between 1900-2066Mhz(friends says he got his to 2100 but it sounds like its not stable) I wish i could get my 5700G to run that patriot viper 4400 still overclocked to 4933CL17-17-17-30 in dual rank instead of single. I cant wait to see what we can get out of 7000 series APUs. Of note I cant seem to get my 12600k with the same kit over 4800CL18, and it was like 64GB/s so probably the equivelant of running the memory at 2:1, like i said, i dont know what i'm doing

[@malphadour]

I think you may have misunderstood what he was saying. tRFC should be as low as you can get it- this is how long it takes to perform the refresh - so a higher tRFC would mean a longer refresh and thus more time that your ram is sat waiting. tREFI is the one you want to increase, but unfortunately this is locked on Ryzen platforms.

[@denvera1g1]

@@malphadour You're right, the one where he said most people set to 32k. It would be nice if my 5700G could set this, so i'll just have to try on my 12600k. I'm going to have to do some reading about how to overclock on alderlake. With a different kit, I was able to hit XMP 5000 CL19-19-28-28 (? dont know if thats right but thats what the kingston renegade 5000 kit specs page says) Edit, 5000 kit was still slower than the 5700G with the viper steel 4933 CL17-17-17-30 I had originally bought the renegade 5000 kit to play with the 5700G/5600G, but with that kit i couldnt even get it running at 4200CL22. I was happy it at least worked with Alderlake

[@nathangamble125]

"Going to definately try raising TRFc instead of lowering it" Keep tRFC as low as possible. tREFI is the one that should be high. tRFC being higher means your RAM spends more time refreshing, and therefore less time storing or sending data.

[@JeKramxel]

Really wonderful explanation! Thanks!

[@areng871]

Thanks , for explaining the banks . Mynext ddr5 platform will do picking more banks. But how bout freq oc and timing for the high density one?

[@jantube358]

34:11 - Chapter about on-die ECC - What is the difference between DDR4 ECC RAM and DDR5 on-die ECC? (The error correction with on-die ECC is on the DIMM so the path from the DIMM to the CPU is not protected.) - Do bit flip errors happen mostly on die or on the way to the CPU? (I guess on die which would be good for DDR5. I think every RAM ECC is a good feature. Proper ECC would be even better.)

[@IceAce1]

While there is different DDR4 ECC (UDIMM/RDIMM), the first benefit of ddr5 on-die ECC is that the memory controller of the CPU has less work with the error correction. The on-die ecc means the CPU does not waste cycles waiting for data and extra bandwidth for the ECC data. At the same time it gives memory suppliers better built-in margins for error rates - which will get higher due to ddr5 density, speed, thermals, etc. Regarding error en-route correction the Synopsys document he showed contained a paragraph, but I'm not sure if that covered the regular consumer ddr5 on-die ECC.

[@krandeloy]

I'm a slightly above layman on this stuff, but I actually was able to follow a lot of that. Thank you so much. Now I just need to figure out an easy way how to tell if a memory kit is Single Rank or Dual Rank easily enough to describe it to my family.

[@Mom19]

Tell them: 8 chips on one side: good 4 chips on one side: bad 16 chips on the whole stick: good but bad Single Rank: one sided memory stick Dual Ranl: double sided memory stick

[@loonie5468]

Other than looking up the specific memory kit's, that you bought, serial number on the internet, to find the manufacturer specs for its ranks, if you don't have that specific serial number of the kit you can try to just look under the heat shields and you'll likely see the chips lined up along the bottom side of the stick. If they're only on one side of the stick, it's a Single Rank stick, but if they're on both sides of the stick, it's a Dual Rank stick. Can be hard to see under that heat shielding, tho.

[@gamingvibrations5320]

Just what I was looking for, a new AHOC informative video!

[@OlettaLiano]

Thanks, this has been very informative.

[@jeffreybouman2110]

What a Great Video, thank you so very much

[@haroldburrow4363]

How long do you think it will be until we see a performance uplift large enough to necessitate upgrading to DDR5?

[@Kaan742]

1,5 years.

[@Romanitto]

I feel like i went back to college, and took a nap in class room 😅😅

[@ilkerYT]

Such a nice explanation simple as it can be.

[@ShaneHerald]

man you know how glad i am i found your channel here.....ive heard and seen so much bullshit all over the internet on ram man ....and when your learning timings its hard to separate the good from the bad info out there ....thanks for all the videos and making my mind a better place ...lol......i got my ddr4 Micron b die cruising man stupid tight timings for D4Mb.....and my samsung b die .....it will boot up in my 3950x at ridicules timings and at 4200mhz ....not 1:1 ..but still stupid fun to see .......thanks man .... the knowledge you have on timings and ram is much needed out here ..now we need all you tubers taking BUILDZOID'S RAM CLASS'S.....and fast to ....lol..

[@telepresencebot2]

23:00 is this part of why Intel lost so consistently and badly to Ryzen in compression/decompression work loads?

[@ActuallyHardcoreOverclocking]

That would make sense.

[@yooanto9465]

@@ActuallyHardcoreOverclocking which one has less errors ddr5 or ddr4?

[@optical10]

Cheers finally well explained video

[@proesterchen]

Wohoo, a reference video! Nice! 👍

[@thomasb1521]

wait till OEMs realise you can run a single sub channel.

[@NathanOakley1980]

At what speed does DDR5 beat the best DDR4 has to offer?

[@NathanOakley1980]

24:30 “straight up just beat it” At what point can you just throw in ddr5 and know that you are beating the best of ddr4 with zero effort?

[@telepresencebot2]

So can some frame time spikes in games be traced back to the ram busy with a refresh? And does that mean ddr5 could in theory have fewer frame time spikes?

[@yooanto9465]

Just get 32gb you won't get any spikes

[@DJaquithFL]

All interesting but consumers only care about Price to Performance. Frankly, this early and slower DDR5 standard should have been skipped, and pushed back for the faster DDR5-7200 (PC5-57600) standard. Commercial acceptance is very similar but with the addition of density and efficiency.

[@WytKat]

17mins in and NOW “it gets complicated”!!!!???

[@muhamedal-ataby7324]

Thank you

[@diviumfuror]

What is your prediction for future high end DDR5 CL. Will it go under 30 ?

[@MadPotoo]

Is there any plan on AHOC DDR5 recommendation guide sometime in the future? Bought the Patriot Steel as per your recommendation for my Z390 platform and couldn't be happier lol

[@ratinabox1065]

Can DDR5 inform the controller about on-die ECC errors? And can it be disabled for memory testing? Otherwise it sounds to me like it will just mask errors and make intermediated faults even harder to track down. Edit: I watched to the end. Your answer seems to be no

[@yooanto9465]

So ddr5 is worse

[@christopherjackson2157]

I've been reading a lot lately about core memory the old technology that was replaced by ic memory chips in the 1970s. Its crazy how much of the system we use now is copied directly from ancient technology developed in the 1940s. Even a lot of the primary and secondary timings. Nothing is ever thrown it seems, they just add new layers on top of the old system. Makes me wonder how different a system developed for and with today's technology would look.

[@WhenDoesTheVideoActuallyStart]

I mean, there's just so many ways to efficiently organize data that has to be quickly accessed.

[@JeKramxel]

Think that has more to do with a lack of pure mathematical advances, and as such, we're still using pretty old stuff (in IT terms) as basis for a lot of what we do today.

[@christopherjackson2157]

@@WhenDoesTheVideoActuallyStart That's a good point. A lot of the basic structure follows from the fact that we're accessing bits arrayed in a grid of rows and columns. I'm sure smarter ppl than me have theorized how it might work in higher dimensions.

[@dmanatunga]

You also have to factor that their is heavy friction against big changes due to backwards compatibility, legacy code, and manufacturing flows. A lot of things, from simple programs to OSes are optimized based on certain workflows in DRAM. This also even applies to other hardware parts, such as CPU or GPU. Lastly, you also have to consider all the tooling changes you might have to make in a factory depending on how you tried to change a design.

[@christopherjackson2157]

@@dmanatunga and memory is especially effected by compatibility issues because the memory system is reliant on CPU, motherboard, and ram manufacturers all being on the same page and working together. The last thing anyone wants it's to go back to the issues that existed in the days of ddr3 where almost every issue seemed to be ram related

[@MajsterZ-]

17:28 complicated..,sure 😄

[@nwk6258]

22:30 does an overgrown single channel mean would provide better latency consistency if there are 2 sticks in channel A on a 4 slot, dual channel board? It doesn’t sound to me that it’s gonna be lower but that’s okay as long as it’s consistent. Very specific application, It’s on a T topology board not a daisy chain.

[@nwk6258]

To be clear, I give no fucks about bandwidth and throughput only about latency. Not the lowest possible but the most consistent possible.

[@brandonfrederick8337]

21:07 the system is screwed in such a way that only running in triple channel can save it?

[@jantube358]

Hey, I found some RAM that is very interesting to me: MRC4E360GKKP8GX2 This is the only DDR4 ECC RAM with XMP that I found and I like it! I would like to upgrade to 2 x 16 GB Kits of these one day. Can you tell what ICs are used? Do you think it could be overclocked to 3800 or even 4000? Maybe you could make a short video about overclocking ECC RAM one day? There is a "myth" that you can't OC ECC RAM but this MRC4E360GKKP8GX2 already shows the opposite.

[@corsairsloop3234]

Unless I missed it in the video when ocing ddr5 with built in ecc you won't know where the oc limit is exactly. Because the ecc will fix errors to a point. Also does ecc have any peformance penalties at all.

[@dmanatunga]

In general, there is additional latency to calculate or check the ECC. However, this latency is usually small, a couple cycles. Plus, as far as I can tell, there doesn't really seem to be way a to turn off on-die ECC, so not really a place you can try and get more performance.

[@virtual_GaRy]

Even without ecc finding a 24/7 stable ram overclock is tough. Had all sorts of memtests running for days without errors just for minecraft to crash every 45 minutes. Aa a novice, id rather have ecc correct the occasional mistake even if it makes it slower in the cycle it happens. To find if its stable i guess you would test for performamce regression like you do eith VRAM?

[@zazabean23]

@@dmanatunga ECC has to consume resources to be running & on top of that if there is an error and it gets corrected there's micro stalling and the more errors the worse.

[@dmanatunga]

@@zazabean23 I'm not sure what you are trying to say, but in terms of ECC in DDR5, it is a constant. For writes, the DRAM has to calculate the ECC. For Reads, the DRAM runs the ECC check and correction process. That can typically be done in a couple cycles.

[@zazabean23]

@@dmanatunga how do you think ECC itself runs? Does it use magic? I just pointed out different issues with ECC. ECC is not good for latency.

[@Romanitto]

ddr5 is still expensive now days I still using ddr4 4600 for now. I don't see huge performance difference specifically in games, but there is significant price difference. Maybe later ddr5 will become cheaper and better

[@Dale-TND]

What is the best 64gb kit of DDR4 for AMD you would recommend?

[@Mom19]

2133 Samsung E-die OEM Sticks

[@HodgePodgeProducts]

@@Mom19 That wouldnt be 64GB since 4 dual rank 4Gbit sticks would give you 32GB. Best 64GB kit would probably be a 2x32GB Ballistix kit but they are hard to find in stock now.

[@Dale-TND]

@@Mom19 I thought BZ said not to buy OEM Samsung or other brands because they never speed bin their sticks and that's what companies like Corsair do.

[@altynspiryt1039]

Ballistix 2x32. 2 ranks per channel is a sweet spot and isn't as imc taxing as 4 ranks per channel b-dies. Most of motherboards has daisy-chain dimm topology so make 4 dimms oc results worse. You can try some 4x16 b-die kit when you have t-topology motherboard

[@Mom19]

@@Dale-TND there is something called sarkasm. I'm sorry if I wasn't clear enough about that. I thought people that know a bit of stuff about RAM would understand the joke and would know that this isn't even considerable for anyone other than people that want cheap RAM so "it just works" Ofc any other kit would be way better and I know that, just grab some better sammy B-Die, its not that hard

[@RobertSmith-lh6hg]

So why is DDR 5 so much worse than tuned B-Die if it's designed from the begining to be better?

[@grim3800]

So is it worth getting ddr5 now or just continue using ddr4

[@user-yc5fq9bv3u]

25:30 how is it different from any other new generation of DDR which was slower at the launch? Best absolute CL latency is approximately same for all DDR generations.

[@kuyans3889]

this time the CL latency increase is much bigger, proportionally than other generations. However the various other data transfer efficiency improvements mentioned in this video suggest that simply talking about CL latency is irrelevant.

[@user-yc5fq9bv3u]

@@kuyans3889 best DDR2-800 is CL3 (circa). First gen DDR3-800 has like CL6.

[@NordicNomadv]

soo, should i buy a single 32gb ddr5 ram stick when i upgrade from ddr4? i think u should make another video about that and test that.

[@HodgePodgeProducts]

well no because that would be single-channel. Unless you are trying to do a competitive overclock and dont care about actual performance.

[@Ianochez]

Without checking the litterature, I believed that the two 32bits sub channel were interleaving, thus doubling the effective clock frequency, in a manner that a single 6000 dimm would run two 3000 sub channel interleaved, like half a cycle off phased, a kind of cheated QDR. After watching this I realized that two dephased sub channel wouldn't work at all. so there are just totally independant.

[@RafaMazurekRMZ]

So will we see now less games stutter thanks to individual banks refresh?

[@RafaMazurekRMZ]

@@yooanto9465 with ddr5 compered to ddr4

[@prep0wer]

And DDR6 (Microsoft, Sony...)?

[@prep0wer]

And how does DDR5 affect APU performance?

[@eye776]

​@@prep0wer For current Vega-based APUs (5X00G), DDR4-4000 CL16-19-19-39 is the point of diminishing returns. Past that you get 1-2 extra FPS at best in a few games, but sometimes you get LOWER FPS. And from existing AMD APUs in laptops and the Steam Deck, faster DDR5 isn't exactly going to blow your socks off. It won't make up for the lack of a modern dedicated GPU, it's basically around the level of a GTX 1050.

[@Danmandingo]

*DDR5 is just so damn EXPENSIVE now...* *Was thinking of building a RYZEN 7000 rig, later on this year.* *Will probably just go with 5000 instead.*

[@MicroageHD]

Got a 5800X3D on launch for MSRP. I'll wait for the DDR5 prices to come down and see if the 7000s will work well or not... Remember the first AM4 motherboards? They sucked, especially the early bios versions... Ill get into AM5 when it's a bit more matured.

[@bgop346]

Eh if youre in the usa adl may be a better bet

[@justetan3566]

@@MicroageHD I Mean, some mobos were totally fine atleast quality wise or they were fine if we forget about the price they had, some also became b450s with just the chipset change. We are also talking close to bankrupt amd vs nowadays amd, doubt things will be the same

[@fafiteee]

never buy first gen parts, if you're planning on building a rig raptor lake or zen 3 is probably a better bet because of their more mature platforms

[@WayStedYou]

We are still like 6 or more months away and DDR5 has already been dropping a fair bit since launch

[@loonie5468]

If you practically always want to be single-rank for best performance with DDR5, wouldn't that argue heavily for future casual user DDR5-only platforms to not allow more than two DIMMs anyway, so as to limit less than optimal options for normies that prolly don't know anything about any of this? One could argue capacity issues, but then DDR5 is also said to be coming up with 16 and 32GB DIMMs as the new standard and for regular normie stuff 2x16 or 2x32 is more than enough, while the pros that need that extra RAM can buy HEDT-type platforms instead.

[@nathangamble125]

People like to be able to have dual channel while still being able to increase RAM capacity in the future without having to get rid of their old RAM.

[@loonie5468]

lol @ 36:30

[@eliotrulez]

Wow 3Mio likes :D

[@io1238]

2

[@garlic5065]

Last

[@ddhelmet]

Can you run DDR5 at 3600CL14 @ gear1?

[@ActuallyHardcoreOverclocking]

no

[@RinMinase]

@@ActuallyHardcoreOverclocking May I ask the reason why you can't?

[@ActuallyHardcoreOverclocking]

@@RinMinase it just doesn't work.

[@RinMinase]

@@ActuallyHardcoreOverclocking Ohhh okay. I thought it can be downclocked to retighten the timings again, while still keeping the other benefits of DDR5. 😁

[@ddhelmet]

@@RinMinase yeah that's what I was thinking about.

[@Jsteeeez]

Jays two cents put out a cringe video a month ago complaining how he couldn’t run 4 sticks of ddr5 above something like 5200 ( which is actually pretty high for 4 sticks) and was saying intel should of tested this like he found a fatal flaw or something lol. Half the comments were like it’s Been like that forever, add more ranks (dimms) make it harder to run fast memory. Was a funny video because I watch jay for entertainment, but sometimes he really does zero research yet talks like he knows a lot on the subject.

[@malphadour]

When it comes to the actually technical side of things, other than overclocking graphics cards, jay knows next to fck all. I know the video you are talking about, and it was one of a sequence of 4 or 5 really poor videos he released back to back that all contained so much rubbish I was close to unsubscribing from his channel.

[@yooanto9465]

Bla bla like you know more than him stop being negative and learn bobo

[@pietrmuffei8874]

Second

[@MihaLychBY]

first

[@emmata98]

420 views :D

[@0vers33r1]

I think my x99 memory is better than ddr5 ..... It cost $40 🙃

[@malphadour]

Using that logic....most cars are still better than DDR5..... :)

[@fabiotiburzi]

They did ddr5 like this so that Dell can still use 8 gigs of double capacity chips on a single stick and give you the same performances as 2 sticks on ddr4 for half the cost

[@nathangamble125]

That's not how any of this works. You still need to have the same number of chips to get a 128-bit memory bus (8 for x8, 4 for x16). Module form factor is irrelevant. Whether we call 32 bits or 64 bits a channel is also irrelevant.