DMA Transfer || Direct Memory Access ( DMA ) Transfer in Computer Organization Architecture || COA

[@DIVVELASRINIVASARAO]

if word counter register reaches the value zero, then DMA controller stop the transferring and disables the BR(Bus Request) line and send the interrupt signal to the CPU and release the buses handled by it, Now CPU disables the BG(Bus Grant line) and takes the control of the buses. This is correct.

[@DIVVELASRINIVASARAO]

introduction to DMA video link : kzbin.info/www/bejne/m5Wrq2SQps6efM0 DMA transfer link : kzbin.info/www/bejne/qIech593a6hlpq8 DMA controller link: kzbin.info/www/bejne/mV7XZWtmg8p5gsU

[@Devanshi_123art-craft]

which book you have referred?

[@DIVVELASRINIVASARAO]

I refer Morris Mano text book only, Thank You So much, Please Share this Channel to your Friends and Classmates and told them Please subscribe my KZbin Channel. Please give me your valuable comments, if you have any doubts ask me freely. Thank you so much once again.