Hi Vipin: your Vivado technology channel is the most practical video channel I found from the open-source Xilinx training videos so far.
@hengzhou4566 Жыл бұрын
To be accurate, even better than paid training.
@bushrapraveen842 жыл бұрын
Thank you so much sir for uploading such informative detailed videos about zedboard
@WenjingSong-b5o Жыл бұрын
This is a great video. But when I'm trying to implement on my own. I got a lot of wannings with the excatly same steps. My transmission failed. Could not find where the problem is
@navidvafaei51779 ай бұрын
Hi Vipin, thanks for your great videos. I am going to add PCIe to my zynq. Where can I find the sources for drivers?
@sayantandutta51093 Жыл бұрын
Thank you for making a such detailed video. I am facing a problem when I am trying to do the synthesis. It is asking for the top module. What to do in that case?
@tyagiavinash045 Жыл бұрын
I think you have to create HDL wrapper first.
@mohammadhosseinsame33224 ай бұрын
Hi Vipin, Many thanks for your nice video, I would like to know how do you perform Cache maintenance? In your code I don't see any of the following functions: Xil_DCacheFlushRange , Xil_DCacheInvalidateRange Regards ~
@foxbat2964 жыл бұрын
Thanks for the great clip. If I have an ADC (like PMOD), can i convert data from PMOD IP to stream interface and route data to DDR through DMA? Is it feasible or I have to use memory mapped AXI interface.
@Vipinkmenon4 жыл бұрын
Yes you can transfer the data to ddr using the dma controller. Only thing need to write proper application software. Similar to the one used for image transfer in the image processing application, but this time from a peripheral to the memory. Each time an interrupt is received, configure dma to transfer next set of data
@usamaiqbal8904 жыл бұрын
Thanks for the wonderful tutorials vipin, can you mention the videos related to dma tutorial, i am unable to find the videos related to this tutorial.
@Vipinkmenon4 жыл бұрын
At what time in the video I am mentioning about these videos?
@usamaiqbal8904 жыл бұрын
@@Vipinkmenon i was asking for the video related to software part of this hardware design.. later i found the video on your channel.
@sarankk8864 жыл бұрын
If I only need to read from the DDR ,can I leave s_axis_s2MM disconnected?
@Vipinkmenon4 жыл бұрын
Whether they are marked as mandatory signals in IP I need to check. But generally when you generate DMA controller from the IP catelog that time itself you can specify whether you need only read,write or both interfaces