SPI Bus communication protocol

[@topten7064]

Try about clear and high voice , your information is amazing

[@ridhambhagat6842]

I have seen quite a few videos on SPI, this solved whatever question I had concerning my , much thanks

[@praveennarikelapu2650]

THANK YOU SIR FOR YOUR SPI EXPLANATION TODAY I CLEARED MY DOUBTS IN SPI THROUGH YOU VIDEO

[@kanchanadevi5322]

I like your videos keep up the good work

[@EmbeddedC]

+Kanchana Devi thanks for your feedback

[@rigvedmayekar9886]

Hello Sir! Thanks A Lot for this valuable Info Share... However, I believe there is a slight mistake in the Mode 1 and Mode 3 part: (A) Mode 1 [CLK IDLE =0] : So, the Data on the MISO and MOSI lines must be stable when the CLK is HIGH and can be changed when the CLK is LOW (In video, it is exactly reverse) (B) Mode 3 [CLK IDLE =1] : So, the Data on the MISO and MOSI lines must be stable when the CLK is LOW and can be changed when the CLK is HIGH (In video, it is exactly reverse) Kindly clarify whether my understanding is correct. Thank You!

[@bhavanisana2256]

Nice explanation

[@tydengr]

Great video. thank you

[@NirmalKumar-sc5tk]

Volume is so low.

[@lavanyaekkandolla8512]

Could you please provide the status, data, and control register of SPI ..??

[@rupaknath6900]

Dhanyawaad

[@swethachilveri4123]

Thank you

[@sitiaisyaibrahim5152]

Hi, thank you for your detailed explaination. Is there any online notes from you that I can download for my future ref? I hope to keep a copy, if can :D

[@fs2728]

I think with the statements at 10:00 there is something wrong: clock polarity=0 and clock phase=0, then risung edge, not falling.

[@sirisharamisetti698]

Yes, mode 0 is not clear

[@manjunathv1094]

exactly, i was about to comment by that time i saw your comment. MODE 0 and MODE 1 are not clear

[@mothilalvelkuri3090]

Hello sir, i have a small doub't in the pin connection. MOSI pin of master is connected to MISO of salve or MOSI pin of the slave. Please clarify once.

[@ashutoshpradhan6932]

MOSI pin of master is connected to MOSI pin of slave.

[@namanvohra810]

can you please elaborate the point " No hardware controle flow" in disadvantages of SPI

[@venugopalbv2069]

can you recommend any reference book for this topic please?

[@Praveenkumar-kd4yc]

Add same kind of video for CAN protocol

[@EmbeddedC]

+Praveen kumar will be updated soon keep following the channel

[@joshireddy9192]

Hi , may i know why four modes are required.Can't one mode serve the purpose of data transmission ?what is the benefit of each mode ?

[@radhaaswin6759]

Late but indeed.... Some receiver device could have facility of any only one in 4 modes... According to it transferring device serve... Thnks nd Correct me if I am wrong since am new to embedded..

[@Dhruv.Wadhwa]

Switch off noise reduction of your audio recording device

[@topten7064]

Great video but voice is not very good

[@sbergman0894]

Good video. Never use that music again.

[@bastinfrancis8052]

Explanation is not proper. He is just tells the definition. Not explaining with the diagram.

[@naveenbodige4685]

sir can you please send the verilog code for SPI

[@raghuvamsi2372]

Does arbitration is possible in SPI like in i2c

[@joshireddy9192]

Arbitration is required when more than one master is present and which master is allowed access the bus . since , SPI is single master multi slave interface protocol , arbitration concept is not required here

[@soniajazzal894]

Voice is not audible .....

[@prasathrajendra1983]

spi communication bit by bit recieve or 8 bit....

[@Hari_Achariya]

both same, 8 serial clock pulse are required to shift 8bit data using shift register,

[@prasathrajendra1983]

some times recieve bit by bit using give indivitual pulse to slave wihtot protocal use.....this is possible

[@arunpatro9768]

So many advertisements. Such a waste of time

[@srdjanbabic8304]

Sorry sir, but it's too difficult to follow what you're explaining. You must take care of how you draw on slides and how audio is recorded. It does make a difference, very much. But hey, thanks for the effort and sharing this with us!!!

[@arjunanp7309]

Sir send me pdf

[@naveenbodige4685]

sir can you please send the verilog code for SPI