Hi Sir, this is a great video. Thank you for your hard work! Can you explain why endcap prevents source drain sort at the boundary of design as it has poly extension? What is source drain sort? Why the poly extension will cause it? Why it will harm our design?
@MrHarish4093 жыл бұрын
Excellent information
@TeamVLSI3 жыл бұрын
Glad you liked it
@ArunKumar-wu4px4 жыл бұрын
Nice video...purpose of horizontal pink layer... especially with layout is superb...
@TeamVLSI4 жыл бұрын
Thanks a lot 😊 @Arun
@vainavitutorial4896 Жыл бұрын
Sir what is flat cells in vlsi?
@lakshthakkar30854 жыл бұрын
Are there any open source tools to learn physical design??
@TeamVLSI4 жыл бұрын
Hi Laksh, I have no much idea about this, But I have heard about this from Kunal Ghosh, you may check the following link from VSD. www.vlsisystemdesign.com/vsd-a-complete-guide-to-install-open-source-eda-tools/
@lakshthakkar30854 жыл бұрын
@@TeamVLSI thank you sir!
@pavankumarVilasagar4 жыл бұрын
Hi, What I observed is that Nwell is extended on both sides of PR boundary for standard cells, whereas, Nwell is extended on one side of PR boundary and other side it terminates exactly at PR boundary for Endcap cell. Left and Right of a row, Endcap cells are place for Nwell discontinuity and Top and bottom, Edge fillers are placed for poly discontinuity. Correct?
@TeamVLSI4 жыл бұрын
Yes, your theory seems correct. But in actual layout I have found nwell in such a way. Anyway let me verify again and I will come back to you.
@TeamVLSI4 жыл бұрын
Hi @Pavan Can you ping me on teamvlsi2014@gmail.com? I need to discuss something personally.
@lakshthakkar30854 жыл бұрын
@@TeamVLSI are there any open source tools to learn physical design
@praneethd.shetty31974 жыл бұрын
Can u explain how endcap will discontinue nwell and fillers will discontinue ploy. @pavan kumar Vilasagar...@Team VLSI
@siddharthdhulipala244 жыл бұрын
@@lakshthakkar3085 search qflow, using linux u can download pnr tools
@DHANANJAYKUMAR-tu4mo3 жыл бұрын
How can I import the Design without technology file? Please suggest if there is any way..
@TeamVLSI3 жыл бұрын
Answer is no. You can only visualize the gds/oasis.
@DHANANJAYKUMAR-tu4mo3 жыл бұрын
Very helpful
@TeamVLSI3 жыл бұрын
Thanks Dhananjay, Glad it helped.
@nikitak36054 жыл бұрын
please make videos on icc2 tool
@TeamVLSI4 жыл бұрын
Sure Nikita, We will try.
@snkhy56313 жыл бұрын
Thank you sir.
@TeamVLSI3 жыл бұрын
Most welcome
@srinidhiala36724 жыл бұрын
Thank you for the Video.. I have one doubt here, we use different kinds of encap cells. Based on what creteria these cells will be designed this many types ? Is that based on position of of dummy poly?
@TeamVLSI4 жыл бұрын
Yes, Srinidhi. You can can check the layout.
@prasadgadipalli70774 жыл бұрын
Hi sir ,Video was nice . But I have doubts You are saying at the end of rows there will be a damage of gate.So is it related to Well proximity effect? Can we use filler instead of endcap cells?If Yes why if no why I am unable to understand the sentence " the nwells of end cap cells are terminated within the cell" and How it is ensuring ther is no gap between well and implant layer? and why endcap prevents source drain sort at the boundary of design as it has poly extension? how?
@Santoshkumar-lw1gf4 жыл бұрын
hi sir nice video.. can u include source of all the material you refferred. thanks for video sir ..__/\__
@TeamVLSI4 жыл бұрын
Sorry Santosh , I generally don't keep record or save the content from where I read. It tools long time to research the facts from various sources and 50-60% content are from my own experience.
@Santoshkumar-lw1gf4 жыл бұрын
@@TeamVLSI ok sir ...thanks for reply... i want to study the standards cells and other devices with respect to internal layers like poly, OD ,,Cox..N/Pwells etc can u refer standard books or any other source for them if videos are possible then better from understanding perspective sir. thanks in advance sir.