FPGA Implementation Tutorial - EEVblog

[@solidliqs]

Hey Dave, you should do more videos on FPGAs. We'd love to see them!

[@sciguy14]

@EEVblog Picture a romantic comedy. Then replace the girl with an FPGA, and the guy with an extremely enthusiastic Electrical Engineer. That is this video.

[@martinda7446]

How many of you tried to scroll that data sheet??

[@iSolarSunrise]

"Brings a tear to the eye..." - Dave

[@EEVblog]

@Maytemberr That technique is called Via-in-Pad and is used a fair bit, but generally only if you are desparate and have no other choice. You have to be very careful using it, and often get your vias plugged to get it "just right" without a large failure rate. And in this case you'd need tiny vias anyway. That can be expensive. It would be foolish to go this route unless you absolutely had too.

[@douggale5962]

You are 100% right Dave. If they didn't use the most painful annoying packages, and didn't require a ridiculous number of voltage regulators, they might sell more FPGAs.

[@EEVblog]

@MetalPhreakAU In Australia it's common (in general society) to say "mils" as shorthand for "millimeters", as "mils" is only known by PCB designers. I slip it out occasionally, and it can be confusing to some!

[@gerjaison]

I tell you what i have on my bookshelf, 1) "EMC for Product Designers" - Tim Williams 2) "Printed Circuit Board Design Techniques for EMC Compliance: A Handbook for Designers" - Mark Montrose Lastly - application note for the parts you chose, they'll suggest layout techniques and bypass cap value.

[@EEVblog]

@JHakim1289 Digital devices are switching devices, so that means they "gulps" of current when they switch on every clock edge. This is very high frequency stuff, so you need a bypass cap close by to provide the power without all the inductance of the power supply wiring.

[@EEVblog]

@mikeselectricstuff That can be a big bonus. The 2.5V AUX supply is usually a real PITA. But for this designs there happened to be other stuff running at 2.5V too, so not so bad, but that's not very common.

[@Gin-toki]

As far as I understand, the 100nF is for supressing the switching noise from the logic and clocks, the 1µF is a small storrage capacitor to ensure the chip can draw the nessesary current when it needs to :)

[@mikeselectricstuff]

Something I like about the low-end Lattice FPGAs (EC) over Xilinx is that VccAux can be 3.3V, so you only need 2 supplies.

[@EEVblog]

@fingerboy18 Yes, bad design practice, as it leeches away the solder from the pad. In these situations you can get the vias "plugged" so that doesn't happen, but that costs more.

[@batterydudellc6458]

Its nice to know i'm not the only one who tears up at elegant fan-out patterns.

[@sabamacx]

One of the best intro's to FPGA implementations on youtube! Nice one Dave!

[@JosefWaldi69]

P.S.: Just yesterday a support guy from Agilent presented us the Agilent DSO3054. After the presentation I asked him if I can play around with this device and I activated the easter eggs. He didn't know about these hidden “features” and was totally puzzled ! It was a big fun!

[@EEVblog]

@LSDjTutorials It's "thou", and yes, it's the same as "mil".

[@pepe6666]

thats an awesome video dave. shed some light on a lot of tricky details

[@cretailion81]

Really GREAT video and presentation Dave! I love it! Explanatory and to the point!!! You trully have a talent on this!!! Please... please, PLEASE!!! Do more of this video!

[@xXxhashemxXx]

Thanks dave! I already dilevered my first FPGA design and this video i awesome!

[@MichaelAllwright]

For people wanting to play with FPGAs but don't have the thousands lying around for the required technology (4x4 BGA etc) it might be worth mentioning the breakout boards many distributors offer - this way you can do you design at 7x7 technology and solder/plug the break out board into your PCB...

[@EEVblog]

@jpelczar For a small one like this, yes, manually. But for huge FPGA's I have used Altium's fanout tool. It mostly works if you drive it properly. But you always have to tidy something up.

[@Mr.Laidukas]

This tutorial is what I am coming for to your blog every day and searching for new videos. Keep on going this way :)

[@PeterCCamilleri]

I really enjoyed this one. Instrument reviews and tear downs are OK, but it's nice to see some nitty gritty engineering. Just some thoughts: How did you come to the conclusion of using an FPGA? How did you select your FPGA? How do you determine/design the logic that goes into the FPGA? What are valid items for going into an FPGA and what are not? Again thanks!

[@300000hp]

Really nice! IMO one of the best of your tutorials!

[@Athanazeus]

Well, solders will flow through vias while soldering process, so yes manufacturing issues. Thus, you dont put vias directly onto pads, just a small trace from pad to via. It is possible to do it, but will require extra cost for you.

[@technoHal]

Great Video. More tinkering with FPGA's please! Some playing around with routing Clock nets and differential pairs would be nice!

[@Afrotechmods]

This is amazing

[@goat_industries]

Another great tutorial. I figured that by the time you get to eevblog #10,000 it would contain at least 50% 'adult' language. Just hope i'm still alive to watch it! :)

[@EEVblog]

@xng14 The best thing to do is get a demo board with example apps that work. And then work from there. If you start from scratch like here, it can be much harder.

[@EEVblog]

@WakkoXtreme I've talked about this on TheAmpHour a few times. And I've done a video on why patents are generally a BAD idea for this sort of stuff. Not enough space here to elaborate, but good material for another drive time rant!

[@44209david]

Great Stuff Dave more FPGA stuff!!! and also an hour for this kinda video is great!! Don't worry about those others who cant sit down and watch the whole thing in one sitting, have thay ever thought of pause? Keep it up!!!

[@shamimahamed6939]

Thanks Dave. Your tutorial helped a lot.

[@jonandse]

Lattice has some neat mach-xo devices with lots of logic in small packages - even a 2.5x2.5mm package! Now I haven't used Lattice since they were AMD but their glossy papers look nice so it might be worth checking out!!

[@Fiddleron]

I don't understand most of this, and it was so crazy I'm not sure I learned anything other than don't use FPGAs, BUT it was entertaining.

[@srscricket]

Thanks for the vid, always happy to watch a new one from you... cheers

[@NaokisRC]

Ah finally this makes sense. So you'd use this by most/all devices? Also for I/O would you always use a pull up/down resistor and have it by every device? New to electronic design in general, only just figured out how to make a 555 clock and use it for a decade counter and a shift register

[@EEVblog]

@legokidnaruto Maybe if absolutely necessary. But best to follow the manufacturers recommended footprint closely.

[@asadhasan7485]

This channel is awesome.

[@atharrasul]

@EEVblog Very nice and informative video. More often than not you wander off topic and come back after realizing it. The fact is, they are some of the most important tips and tricks about say pcb routing and other technical stuff like that, that only experience can teach you. So don't worry about the length of video, the longer you rant on, the better for beginners. It would be helpful if you could take your time in making a vlog about programming aspects of FPGA's aswell.

[@JivenJim]

Fantastic video;+) I have done a lot of nano

[@ElectronicsAustralia]

Another awesome video Dave! Not having ever touched an FPGA in my life I'm only partially scared now! Have no idea about the required dev tools, both Software and Hardware but will now go and check them out :-) Thanks!

[@EEVblog]

@300000hp It's an analog scope.

[@successcoachjesusm]

Why is R28 180k when the desired output is 1.5V? The data sheet for the LT3080 states that Vout = Rref * 10uA. Any clues? This R28 will produce 1.8V which does not match the net name. Refer to 32:33 in the video.

[@k7adi]

Sometimes this is necessary in order to minimize loop inductance, therefore, the ESR of the mounted capacitor

[@EEVblog]

@Films4You Damn, I did use a lot of acronyms huh?

[@dumyyyyyy]

You are a gold mine as always! Thank you for such useful tips!

[@TheAdambee7]

Good stuff mate. Really informative. just starting to get my head around these things myself.

[@wasup23tube]

BADASS VIDEO MAN I CANT BELIEVE I MISSED THIS ONE

[@arlenalem]

Hi, I have query about How to route the signal clock in pcb, I have two situations. Situation 1: I have a source clock and two ADC converter(one channel each one) which will use the same clock signal, the trace of the clock signal from the source clock to adc converters have to be two separated tracks ? or they could be the same track and the separated tracks? , if so ,what restrictions I should take account (track width, lenght..).

[@EEVblog]

@JosefWaldi69 Good question. I forgot to mention that. Yes, it matches the requirements of the final design. This is a proto board that is designed to test that specific FPGA device for various things, so the actual device has to be used.

[@RandyLott]

@EEVblog Thanks! That makes sense. Does it hold true for vias that are fully plated with no hole left?

[@mattmoreira210]

Thank you, Dave. Now my ass hurts badly.

[@mattmoreira210]

Dave said "it's a pain in the ass" hence my response, everyone.

[@Bugtrooper]

I'm working in manufacturing, to be precise I'm working with lasers (both cutting and engraving). Should I try to create some really fine boards? I think that the machine is able to create (destroy) a 0.02 mm line.

[@lduren1]

David, thanks for the video! Although I did not understand much of it it was very interesting.

[@AbeDillon]

Dave, I've read that you can use a pair of LVDS pins (along with a third output pin) on an FPGA to implement a delta-sigma ADC. Can you do a video on that?

[@EEVblog]

@cretailion81 I don't know about "to the point", that's not something I often hear in regards to my blogs!

[@RandyLott]

Would you suggest passing the output from the previous regulator to the next highest voltage regulator? Let's say you have a 5V and 3.3V regulator. That's 1.7V across the second regulator. If it's a LDO device, that's quite a lot of waste, huh?

[@EEVblog]

@tsaavik I'm in TheAmpHour recording studio!

[@JosefWaldi69]

Hi Dave, thanks a lot for that great video. Just a question: Why are you using such a tiny FPGA with all the problems mentioned in your video if you have that much space available on your PCB? Is it because the specification of that FPGA matches best the requirements of your project or is it your personal challenge?

[@FalcoGer]

What is a bypass capacitor? That cap is going to provide some power when the voltage drops briefly or absorb some when the voltage spikes. why is it needed if you have a chip that can operate anywhere between 1.2 and 1.5V? just put 1.3 on there to be safe, surely it'd not drop by 0.1V on a well regulated supply

[@philipacovington]

Interesting video! FPGAs are really great for those interesting in retro-computing or learning how a CPU works. I am implementing Ben Eater's 8-bit computer in an FPGA in a series of videos on my channel for anyone interested.

[@MetalPhreakAU]

mils refers to milli-inch but is sometimes confused with millimeter. A mil and a thou are the same thing :)

[@DaniyalNoor]

Thanks for the video Dave !!

[@mubasheer5584]

A really good video for the beginners to the FPGA field. And the way your pain in the ass 😂keep it up that made your video cool to watch and interesting 👍

[@irgski]

Hi Dave, what about using "via in pad" for pcb design?

[@gnagyusa]

+irgski I use vias in pads all the time and they work well. You get the added benefit of better thermal conductivity. I use exposed copper on the other side, so I have a "free" heat sink as well (assuming you can form a continuous ground or power plane on the other side). You just need to watch out for the solder getting wicked to the opposite side (capillary effect through vias).

[@irgski]

Hi Dave, what's your opinion on "via in pad" for PCB layouts?

[@marshaul]

I think your potential PCB manufacturers opinions about via-in-pad are more important than Dave's. No disrespect to Dave intended. It's a viable technology, *if it can be manufactured reliably.*

[@RobertGallop]

Another great video, thumbs up. Do more!

[@優さん-n7m]

A new video on how to create PCB for 1000+ (pins) BGA FPGA like Stratix or Virtex or Versal FPGA with DDR4 and SERDES?

[@EEVblog]

@mitpatterson Yeah, I should taken a few more minutes to discuss everything :->

[@philbx1]

Whoosh! Over the head here, but very informative Dave. Strangely enough the only comment I can make is that the tracks would make for a great T-shirt design. Maybe accompanied by the words "BGA = PITA" :-)

[@RandyLott]

Is it bad design practice to put vias in SMD pads? If so, why? It seems like you could put a via right in all of your ground pads and it would be directly connected to your bottom ground plane without any traces. It would also be tented only on the ground plane side. Is it a manufacturing issue?

[@theIpatix]

Aren't parallel connected capacitors basically the total of both (-> 1.1µF then)? As far as I know there is not a big difference in charging and decharging speeds from different capacitor types.

[@mrdanker6756]

Different types of capacitors have different physics, like an electrolytic capacitor has a lot of capacitance easily, but a lot of internal resistance compared to a ceramic capacitor. Internal resistance limits the amps a bit, which matters a lot when you get into really small stuff. Also, in addition to ESR differences, a ceramic capacitor is piezoelectric a bit, while an electrolytic capacitor has things like dielectric absorption. You just gotta remember every component isn't made of the same stuff, therefore not every component has the same exact physics, just works as a component with its own advantages and disadvantages. For 1.1uF and .1uF, you'd have the low capacitance capacitor with a very low ESR to filter out high-frequency-low-amplitude noise or fluctuations in voltage, where the larger capacitor does the bulk of stuff like handling when the device suddenly surges its power consumption and needs a little extra power. Ceramic capacitors, Electrolytic capacitors, aluminum capcitors, polymer capacitors, paper capacitors, tantalum capacitors, mica capacitors, there's tons of different kinds. I think dave has a video on them actually.

[@sciguy14]

This is like a feature length movie.

[@robinhodson9890]

And he talks slowly, so run it at 1.5x speed, and skip past the bits that aren't relevant.

[@matthiasBdot]

would you like to share you demo board design files? the igloo nano is a nice beginner fpga. I just ordered the actel igloo nano starter kit and a seperate 100pin flat pack unit since I probably can manage to etch and solder the 0.5mm pin pitch. should be easier than the nasty one you got.

[@davidgermain]

Do have any notes or blogs on the power supply construction for these devices, I am really finding it hard going with fault diagnosis on some boards I have.

[@xng14]

Very good tutorial dave! But my main problem with fpga (and even micros) has always been the damn software ! Any good ressource on fpga programming ?

[@nruegs]

I love rotational symmetry, Helll yeah!

[@sanketghadshi9140]

Thanks bro....U made it simple for Me.

[@erkeklikdestani]

thanks man. you are awesome

[@arlenalem]

Situation 2: It's a little bit different than situation 1, I have a source clock and one ADC converter(two channel , two input clock) , the trace of the clock signal from the source clock to adc converters have to be two separated tracks ? or they could be the same track and the separated tracks?, Thanks in advance

[@kildas]

Where can i get some kind of evaluation / tial version of altium designer 10? I had Protel99 but this seams antique.

[@KLATUBARARA1]

Thank you so much, I use a SPARTAN-3E and dont know how to prog. the SPI ROM.

[@arlenalem]

Hi, I've just starting to use Altium Designer, I'm learning very fast :D , but i don't have a lot of knowledge about design to high frequency, for example clock and bypass capacitor that you explained , is there a book about PCB design ? could You suggest me some books?

[@BenGras]

Me watching this video is like a dog reading the New York Times. But I liked it, watched the whole thing. Wish I understood enough to make my own fpga board

[@EEVblog]

@sciguy14 A B grade horror flick perhaps?, or a Zoombie Apocalypse? :->

[@cosmiclightning4723]

I'm trying to do this, and the description doesn't make any sense to me, you say 4/4 track/space, but I think you mean 4/3.. Standard footprint and 4/4 implies the standard footprint has 0.1mm diameter balls (because 0.1mm space + 0.1mm track + 0.1mm space = 0.3mm, with a 0.4mm pitch that means the ball has to be 0.4mm - 0.3mm = 0.1mm ball). I'm guessing you used ~0.15mm ball (The altium igloo nano design library pad diameter), 0.1mm track and 0.75mm spacing with the pad. Is this correct?

[@jakhanggwra92]

hi! sir could you please tell me how to make own custom BGA footprint in altium designer

[@777mhd777]

Great Channel very helpful

[@Ikkepop]

i was contemplating on getting into some fpga programming but i cant decide weather to get a spartan 6 or a spartan 3e no idea how to compare them since one uses gate count the other slice count or w/e that was any input on that?

[@NikolajGoodger]

For ideal capacitors a 1uF and 100nF in parallel are the same as a 1.1uF capacitor. This assumption is fine for low bandwidth electronics but real capacitors also have parasitic inductance and resistance. With that in mind the reason for having these two capacitors is to offer low impedance for a wider bandwidth which allows the high frequency digital signals the FPGA is capable of producing. If you want to know more you should read about decoupling/bypass capacitors for high speed digital electronics.

[@Dibblah1900]

@fingerboy18 Well, the power is wasted anyway. You may as well spread the dissipation out between the two regulators if they can cope with it.

[@spacewaves94]

To the datasheet!

[@theIpatix]

Why do you need a 100nF and a 1µF bypass Cap and not just only the 1µF?

[@chaitanyaprasad6924]

Dave can we have a online simulator for Fpga..?? Where we can know the amount of time taken for running a code also..?

[@legokidnaruto]

I have a question about BGA components... Can i make the pads on my board smaller than the ball size of the BGA package used?

[@300000hp]

P.S. In the beginning of the video, what's that device without cover with bare PCBs behind you?

[@steveb7600]

You arnt going to get close to using all the fabric as a beginner anyway so you dont need the larger 6. Go for the Papilio One or the DEO-Nano boards, great for beginners.

[@EEVblog]

@woo216 No, they are just different.

[@Galfonz]

Doesn't the programming voltage come from the programming header? It isn't needed during normal operation.