(Fully Custom IP, Interrupt, and Driver) Embedded Development with Zynq7000 and Zybo Board - Video 3

[@badejavuade6774]

Thanks for the detailed video. I think the IP Packager in Vivado allows you to add your .c and .h driver files when packaging. It will then automatically import it to the SDK when the IP used in a design

[@once.ordinary]

Thank you. It worked.

[@nunustone7133]

Hi, Thx for the content. I have a common question. When creating the Custom IP, three files are created. PLtoPSInterrupt_v1_0.vhd (Top-Level) PLtoPSInterrupt_v1_0_S_AXI_INTR.vhd (Sub-Level IRQ) PLtoPSInterrupt_v1_0_S00_AXI.vhd (Sub-Level Common Function). In this example, a counter is implemented in the (Sub-Level IRQ). There is no connection to the (Sub-Level Common Function). My question is: Is it the normal approach from an architectural perspective not to connect the two Sub-Level components?

[@fedorhotabich]

Thank you, thanks to your code i found a mistake in AXI slave interrupt verilog code of the counter in vivado 2015. Counter asserts irq only once and therefore interrupts appear just after programming fpga. Further starts in configurations without system reset and programming fpga do not show any interrupts. I need debugging AXI. Before, I tried similar, whithout gpio, Xilinx AR#60837 (KC705) but on zedboard with the same mistake.

[@mohsentarashi]

Hello. Great 👍 I have a problem in creating a custom SPI IP-core for Zynq 7020, I want to make some changes in that core so I need custom IP-core! How can I get a VHDL/Verilog code for SPI?

[@christiangrenier9434]

Can you confirm that the PL clk frequency for the Zybo board is 100 MHz and Zybo Z7 is 125 MHZ?

[@mohsentarashi]

As another question, 2nd challenge, I want to use Xilinx FFT IP-core, I created a design of the system, But I don't know how to write C codes for the PS part in SDK. Can you help me?

[@Drtsaga]

Hi all, it did not work for me. All I see is the leds blinking. (Please let me know if somebody make it work for Vivado 2018.3). thx

[@HaSongSon123]

Same here

[@tempusFugit1337]

Hi i have question. Could you give some instructions which parts of the code have to be modified if you want to run this on the same Zynq-Chip but on another board ? In my case it would be an Eclypse Z7 board. Also it would be good to know which lines of code you wrote yourself and which lines had been copied from the Xilinx Libraries because this would also help to know which lines of code had to be modified to run the application on other Zynq-Boards. Thx in advance and Greetings.

[@sudekici]

Hello, can you please share the .c and .h codes for us, thank you in advance!

[@iFxLife50Yrs]

Hi , this is very useful. Can you share the source code ? Thanks

[@victorricardoaguilerasanch6888]

Did you get the code?? I also need it, please someone to share it. Thanks!

[@iFxLife50Yrs]

Nope,

[@doofus_robot7287]

good content, but yawn. hard to stay focused with the pace and lack of structured progression. take 3 will be a winner.